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What generally happens to risk production product?

M. Y. Zuo

Active member
Hi everyone! This is my first post here.

I’ve been trying to understand how the process works, specifically the story of TSMC’s deal with Apple for their N5 production, where Apple reportedly booked the entire capacity for sometime. It seems that 13 months elapsed between risk production start (March 2019) and ramping up to full rate production (April 2020). Presumably some tens of thousands of wafers were manufactured with working chips, to varying degrees of acceptability, during this period.

From what I understand, Apple and TSMC got the vast majority of wafers made during risk production? Or am I misunderstanding how these agreements work?

And if so, what happened to them? Were some of them eventually put into Apple’s products, along with the regular wafers, or were they all purely for internal use?
 
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And if so, what happened to them? Were some of them eventually put into Apple’s products, along with the regular wafers, or were they all purely for internal use?
Risk Production is generally the state when you can manufacture a full wafer of the same part (as opposed to Multi-party shuttles or R&D efforts) for the first time and expect to get reasonable yields out of the fab. This also tends to correspond with the release of the "final" PDK from the Foundry (production design rules and electrical model). Silicon manufactured at this point is typically used for Engineering Samples or Qualification Samples for development of products prior to PRQ (production qualification). Different design houses may refer to this as "A0" or "Z0" wafer mask set, with the expectation that production silicon is "A1" or "B0" stepping, depending on BEOL only changes or full die. Apple does not print this on their die, so difficult to tell what specific revision is their production silicon.

In the case of Apple, you would assume the iPhone release date of ~October 2020 and work back from there when the N5 production silicon masks were released for A14. Date code of the die also gives a clue as to when that silicon came out of production, but TSMC will also state on their own website when RP occurred and as well generally when they are in "full" production, which is typically a year later.
 
Risk Production is generally the state when you can manufacture a full wafer of the same part (as opposed to Multi-party shuttles or R&D efforts) for the first time and expect to get reasonable yields out of the fab. This also tends to correspond with the release of the "final" PDK from the Foundry (production design rules and electrical model). Silicon manufactured at this point is typically used for Engineering Samples or Qualification Samples for development of products prior to PRQ (production qualification). Different design houses may refer to this as "A0" or "Z0" wafer mask set, with the expectation that production silicon is "A1" or "B0" stepping, depending on BEOL only changes or full die. Apple does not print this on their die, so difficult to tell what specific revision is their production silicon.

In the case of Apple, you would assume the iPhone release date of ~October 2020 and work back from there when the N5 production silicon masks were released for A14. Date code of the die also gives a clue as to when that silicon came out of production, but TSMC will also state on their own website when RP occurred and as well generally when they are in "full" production, which is typically a year later.
Thanks for the detailed reply. Considering the size of the A14 die, for example, it’s likely millions of working chips were produced prior to April 2020. Since it seems highly unlikely they would all be engineering samples, etc., that would imply Apple was storing most of them for eventual use. Am I correct in understanding that’s how the general process works, not being limited to just Apple’s special relationship?
 
Thanks for the detailed reply. Considering the size of the A14 die, for example, it’s likely millions of working chips were produced prior to April 2020. Since it seems highly unlikely they would all be engineering samples, etc., that would imply Apple was storing most of them for eventual use. Am I correct in understanding that’s how the general process works, not being limited to just Apple’s special relationship?

Apple is different. Apple and TSMC freeze the PDK and process in December for production the next year so there is not much risk volume. No other companies use Apple's specialized SoC process.
 
Apple is different. Apple and TSMC freeze the PDK and process in December for production the next year so there is not much risk volume. No other companies use Apple's specialized SoC process.
Ah I see. So Apple leaves the risk phase earlier, that explains a lot. Considering their combined resources, talent, and motivation, it does’t seems likely Intel or Samsung will be able to catch up to the TSMC+Apple team this decade then, assuming the working relationship remains this closely knit.
 
Thanks for the detailed reply. Considering the size of the A14 die, for example, it’s likely millions of working chips were produced prior to April 2020. Since it seems highly unlikely they would all be engineering samples, etc., that would imply Apple was storing most of them for eventual use. Am I correct in understanding that’s how the general process works, not being limited to just Apple’s special relationship?
The end-product certification cycle, specifically for Cellular radio equipped devices that have to be tested around the globe, is a multi-month effort. It "used to be" about 6 months to certify a radio stack at AT&T supporting 2G/3G/LTE, and I imagine that it is longer now with 5G. Radio stack is certified on the end HW to fall within the guidelines not only of the national telecom operator (eg: FCC in USA) but also each individual carrier the phone will operate with (AT&T, TMo-US, Verizon, etc). So considering Apple has to launch multiple SKU versions of the iPhone (for UMTS vs CDMA 3G; I think their range of bands covers most 4G/5G universally), as well as the iPad using the same processor, I don't think building a million+ units of ES parts is unreasonable for them to complete this effort over H2'19 through H1'20.

These may also be provided to internal employees for debugging (eg: dog-fooding your own product), software development and test, etc. Emulators are nice, but real-time operation of the silicon + pre-release SW is more likely to identify bugs. During the last Apple iPhone "reveal" they also gave a tour of some "labs" which were obviously stage setup but clearly had breakout / development boards for the products there, so ES parts get used in those configurations as well.

Production silicon ramp has to start early enough you can get the wafer produced, packaged/tested, assembled with the DRAM PoP (which comes from multiple suppliers), and then that assembly put on T&R and shipped over to Foxconn to be assembled onto the processor board. Radio boards can be developed in parallel, given that their latest designs use a sandwich of two PCBs, one radio the other AP + Storage. Assembled motherboard goes into phone chassis, all the ZIF plugs connected, finished good tested, boxed, put onto skids and shipped to Telcos across the globe or to distribution centers for people who pre-ordered.

My guess would be that from Silicon leaving the fab to finished good on shelves is about 8-10 weeks once in volume production, and again, that can be validated by looking at teardowns of products sold in October 2020 having a Silicon date code of ~July 2020. The "unknown" is the time from final masks being released to silicon coming out of the fab, and that is a trade secret for TSMC.

Historically, you could look at HiSilicon as the other first-to-market consumer of a new node from TSMC, and for Kirin9000 (the only other N5 customer that has shipped so far) it is clear from the die info that they released their QS masks as production parts, because they didn't have time to spin new masks and ramp volume before the Sept 14th 2020 cut-off date. So in that case yes, they literally stockpiled as much material as they could from a pre-production silicon version and opted to use that in their product offerings (Mate 40 and the like). Apple die info only lists the die codename/ID, nothing about the mask revision / stepping so not easy to tell if they would be using pre-production silicon or not. Most hard IP vendors would not stand behind their designs if it has not been certified against the PDK1.0 specs either.
 
The end-product certification cycle, specifically for Cellular radio equipped devices that have to be tested around the globe, is a multi-month effort. It "used to be" about 6 months to certify a radio stack at AT&T supporting 2G/3G/LTE, and I imagine that it is longer now with 5G. Radio stack is certified on the end HW to fall within the guidelines not only of the national telecom operator (eg: FCC in USA) but also each individual carrier the phone will operate with (AT&T, TMo-US, Verizon, etc). So considering Apple has to launch multiple SKU versions of the iPhone (for UMTS vs CDMA 3G; I think their range of bands covers most 4G/5G universally), as well as the iPad using the same processor, I don't think building a million+ units of ES parts is unreasonable for them to complete this effort over H2'19 through H1'20.

These may also be provided to internal employees for debugging (eg: dog-fooding your own product), software development and test, etc. Emulators are nice, but real-time operation of the silicon + pre-release SW is more likely to identify bugs. During the last Apple iPhone "reveal" they also gave a tour of some "labs" which were obviously stage setup but clearly had breakout / development boards for the products there, so ES parts get used in those configurations as well.

Production silicon ramp has to start early enough you can get the wafer produced, packaged/tested, assembled with the DRAM PoP (which comes from multiple suppliers), and then that assembly put on T&R and shipped over to Foxconn to be assembled onto the processor board. Radio boards can be developed in parallel, given that their latest designs use a sandwich of two PCBs, one radio the other AP + Storage. Assembled motherboard goes into phone chassis, all the ZIF plugs connected, finished good tested, boxed, put onto skids and shipped to Telcos across the globe or to distribution centers for people who pre-ordered.

My guess would be that from Silicon leaving the fab to finished good on shelves is about 8-10 weeks once in volume production, and again, that can be validated by looking at teardowns of products sold in October 2020 having a Silicon date code of ~July 2020. The "unknown" is the time from final masks being released to silicon coming out of the fab, and that is a trade secret for TSMC.

Historically, you could look at HiSilicon as the other first-to-market consumer of a new node from TSMC, and for Kirin9000 (the only other N5 customer that has shipped so far) it is clear from the die info that they released their QS masks as production parts, because they didn't have time to spin new masks and ramp volume before the Sept 14th 2020 cut-off date. So in that case yes, they literally stockpiled as much material as they could from a pre-production silicon version and opted to use that in their product offerings (Mate 40 and the like). Apple die info only lists the die codename/ID, nothing about the mask revision / stepping so not easy to tell if they would be using pre-production silicon or not. Most hard IP vendors would not stand behind their designs if it has not been certified against the PDK1.0 specs either.

The other problem for N5 (and below) is fab cycle time, which is about double the delay you guessed...
 
The end-product certification cycle, specifically for Cellular radio equipped devices that have to be tested around the globe, is a multi-month effort. It "used to be" about 6 months to certify a radio stack at AT&T supporting 2G/3G/LTE, and I imagine that it is longer now with 5G. Radio stack is certified on the end HW to fall within the guidelines not only of the national telecom operator (eg: FCC in USA) but also each individual carrier the phone will operate with (AT&T, TMo-US, Verizon, etc). So considering Apple has to launch multiple SKU versions of the iPhone (for UMTS vs CDMA 3G; I think their range of bands covers most 4G/5G universally), as well as the iPad using the same processor, I don't think building a million+ units of ES parts is unreasonable for them to complete this effort over H2'19 through H1'20.

These may also be provided to internal employees for debugging (eg: dog-fooding your own product), software development and test, etc. Emulators are nice, but real-time operation of the silicon + pre-release SW is more likely to identify bugs. During the last Apple iPhone "reveal" they also gave a tour of some "labs" which were obviously stage setup but clearly had breakout / development boards for the products there, so ES parts get used in those configurations as well.

Production silicon ramp has to start early enough you can get the wafer produced, packaged/tested, assembled with the DRAM PoP (which comes from multiple suppliers), and then that assembly put on T&R and shipped over to Foxconn to be assembled onto the processor board. Radio boards can be developed in parallel, given that their latest designs use a sandwich of two PCBs, one radio the other AP + Storage. Assembled motherboard goes into phone chassis, all the ZIF plugs connected, finished good tested, boxed, put onto skids and shipped to Telcos across the globe or to distribution centers for people who pre-ordered.

My guess would be that from Silicon leaving the fab to finished good on shelves is about 8-10 weeks once in volume production, and again, that can be validated by looking at teardowns of products sold in October 2020 having a Silicon date code of ~July 2020. The "unknown" is the time from final masks being released to silicon coming out of the fab, and that is a trade secret for TSMC.

Historically, you could look at HiSilicon as the other first-to-market consumer of a new node from TSMC, and for Kirin9000 (the only other N5 customer that has shipped so far) it is clear from the die info that they released their QS masks as production parts, because they didn't have time to spin new masks and ramp volume before the Sept 14th 2020 cut-off date. So in that case yes, they literally stockpiled as much material as they could from a pre-production silicon version and opted to use that in their product offerings (Mate 40 and the like). Apple die info only lists the die codename/ID, nothing about the mask revision / stepping so not easy to tell if they would be using pre-production silicon or not. Most hard IP vendors would not stand behind their designs if it has not been certified against the PDK1.0 specs either.
Thanks for the detailed answer! As a side note, TSMC’s N3 teething troubles seemed to have delayed Apple’s retail product launch with those chips until 2023, would you expect an extended risk manufacturing period too for N3?
 
Thanks for the detailed answer! As a side note, TSMC’s N3 teething troubles seemed to have delayed Apple’s retail product launch with those chips until 2023, would you expect an extended risk manufacturing period too for N3?

Not lest for other supply chain issues. Apple knows that silicon is very prone to supply chain fluctuations on their scale because they start stockpiling chips 1y+ before manufacturing starts with contract manufacturers, but this time it seems even they got into capacity crunch with audio codecs, and pmic
 
Not lest for other supply chain issues. Apple knows that silicon is very prone to supply chain fluctuations on their scale because they start stockpiling chips 1y+ before manufacturing starts with contract manufacturers, but this time it seems even they got into capacity crunch with audio codecs, and pmic

This all goes away with COVID and we will have a much stronger supply chain than before. As they say what does not kill us makes us stronger. Assuming that we are done with COVID, which is a big assume, 2022 will be a great year for the semiconductor industry, absolutely.
 
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