Trace Design for Crosstalk Reduction

Trace Design for Crosstalk Reduction Description Presented by: Scott McMorrow Returning to basics, we’ll investigate the relationship of trace geometry to crosstalk in interconnect design, and draw some conclusions based on system constraints. Microstrip, stripline, and dual-stripline layer geometries will be examined, and simple rules are derived that can be used to quickly aid in …

Electronic Systems SI/IP Forum

Title: KEYNOTE: Is Power Integrity the New Black Magic? Date: Thursday, April 22, 2021 Time: 01:00 PM Eastern Daylight Time Duration: 1 hour Summary Electronic Systems SI/PI Forum KEYNOTE: Is Power Integrity the New Black Magic? Sponsored by: Cadence Presented by: Istvan Novak, Principal Signal and Power Integrity Engineer, Samtec Abstract: Power integrity (PI) is a relatively new discipline, emerging after electromagnetic …

Memory Con 2023

Computer History Museum, Mountain View, CA

ABOUT THE EVENT MemCon is the first memory event focused on end users and systems. MemCon empowers engineers and architects working on memory-constrained problems with peer insights from case studies in genomics, AIML, datacenter, HPC, computational fluid dynamics, in-memory databases, and enterprise knowledge graphs. If you are working on a memory-bound problem, come and unpack it with your peers, and get your …