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WEBINAR: VLSI Design Methodology Development
September 4, 2019 @ 10:00 AM - 10:30 AM
This webinar provides a brief overview of a new text, VLSI Design Methodology Development. The content of the book will be reviewed, highlighting topics that have recently influenced SoC design methodology features – e.g., FinFET circuit libraries, multipatterning lithography, layout-dependent effects, electromigration analysis and FIT rate calculations, test pattern compression. Although the text is targeted toward providing microelectronics students with an up-to-date description of SoC design flows and methodology options, professional engineers will hopefully also find the discussion of current methodology issues to be of interest. The author will provide examples from the text, followed by a Q&A session.
Thomas Dillinger has more than 30 years of experience in the microelectronics industry, including semiconductor circuit design, fabrication process research, and EDA tool development. He has been responsible for the design methodology development for ASIC, SoC, and complex microprocessor chips for IBM, Sun Microsystems/Oracle, and AMD. He is the author of the book VLSI Engineering and has written for SemiWiki.