Webinar 800x100 (1)
WP_Term Object
(
    [term_id] => 157
    [name] => EDA
    [slug] => eda
    [term_group] => 0
    [term_taxonomy_id] => 157
    [taxonomy] => category
    [description] => Electronic Design Automation
    [parent] => 0
    [count] => 3906
    [filter] => raw
    [cat_ID] => 157
    [category_count] => 3906
    [category_description] => Electronic Design Automation
    [cat_name] => EDA
    [category_nicename] => eda
    [category_parent] => 0
)

Jasper User Group Meeting

Jasper User Group Meeting
by Paul McLellan on 10-07-2011 at 11:59 am

 Jasper’s Annual User Group Meeting is on November 9th and 10th, in Cupertino California. It will feature users from all over the world sharing the best practices in verification. If you are a user of Jasper’s products then you should definitely plan to attend. This year there is so much good material that the meeting is two days long.

Of course there will be many presentations by Jasper themselves. But much of the meeting will be taken up with users presenting their own experiences. If you are a Jasper customer and are interested in proposing a presentation, then contact Rob van Blommestein at robvb@jasper-da.com.

The full agenda is still being developed, but already there are user presentations on:

  • Simulation task reduction
  • RTL verification
  • X-propagation
  • Using formal to verify real CPUs
  • RTL sequential equivalence checking
  • Micro-architecture validation
  • SoC integration
  • Macro verification
  • RTL Development
  • Post-silicon debug

and presentations by Jasper on:

  • Product roadmap
  • Hints and tips for using Jasper solutions more effectively
  • Architecture validation
  • Creating verification IP
  • Introduction to intelligent proof kits
  • Property synthesis

To find out more about the meeting, or to register for the event, go here.

Share this post via:

Comments

There are no comments yet.

You must register or log in to view/post comments.