While the debate rages on about 28nm yield at foundry juggernaut TSMC, on Monday I attended a webinar on 20nm IC design hosted by TSMC and Synopsys. Double Patterning Technology (DPT) becomes a requirement for several layers of your 20nm IC design which then impact many of your EDA tools and methodology.… Read More
Intel says fabless model collapsing… really?
There is an interesting discussion in the SemiWiki forum in response to the EETimes article: Intel exec says fabless model ‘collapsing’. Definitely an interesting debate, one worth our time since the advertising click hungry industry pundits will certainly jump all over it. Clearly I’m biased since I helped build… Read More
TSMC 28nm Beats Q1 2012 Expectations!
TSMC just finished theQ1 conference call. I will let the experts haggle over the wording of the financial analysis, but the big news is that TSMC 28nm Q1 revenue was 5%, beating my guess of 4%. So all of you who bet against TSMC 28nm it’s time to pay up! Coincidentally, I’m in Las Vegas where the term deadbeat is taken literally!
Per my … Read More
TSMC versus Intel at 20nm!
The biggest news out of the TSMC Symposium last week was the 20nm update. Lots of debate and speculation, just why is TSMC releasing one version of 20nm (20nm SoC) versus multiple versions like in 40nm (LP, G, LPG) and 28nm (HP, HPM, HPL, LP)? Here are my thoughts, I would also be interested in your feedback in the comment section. This… Read More
Qualcomm Meets Jerry Sanders at 28nm
First the good news: 4G LTE design in activity is off the charts as OEMs building smartphones, tablets and Ultrabooks are buying into the capability for product rollouts that will occur starting in September. Now the bad news: there’s not enough to go around until probably well into 2013. For a Company sitting on over $26B in cash,… Read More
Introduction to FinFET technology Part I
This is the first of a multi-part series, to introduce FinFET technology to SemiWiki readers. These articles will highlight the technology’s key characteristics, and describe some of the advantages, disadvantages, and challenges associated with this transition. Topics in this series will include FinFET fabrication,… Read More
Intel Postgame Q1 2012 Earnings
Listening to the Intel earnings call yesterday and then reviewing the transcript last night, I came away with two thoughts that I think are key to understanding where the PC and mobile industry… Read More
Atrenta’s Spring Cleaning Deal
Atrenta is having a special offer to let you “spring clean” your IP for free. They are providing two weeks of free access to the Atrenta IP kit starting from today, April 16th, until the end of May. During this period, qualified design groups in the US will be able to use the kit for two consecutive weeks to “spring… Read More
Making your ARMs POP
Just in time for TSMC’s technology symposium (tomorrow) ARM have announced a whole portfolio of new Processor Optimization Packs (POPs) for TSMC 40nm and 28nm. For most people, me included, my first question was ‘What is a POP?’
A POP is three things:
- physical IP
- certified benchmarking
- implementation knowledge
The Truth of TSMC 28nm Yield!
As I write this I sit heavyhearted in the EVA executive lounge returning from my 69[SUP]th[/SUP] trip to Taiwan. I go every month or so, you do the math. This trip was very disappointing as I can now confirm that just about everything you have read about TSMC 28nm yield is absolutely MANURE!… Read More