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3D NAND Myths and Realities

3D NAND Myths and Realities
by Scotten Jones on 06-30-2017 at 9:00 am

For many year 2D NAND drove lithography for the semiconductor industry with the smallest printed dimensions and yearly shrinks. As 2D NAND shrunk down to the mid-teens nodes, 16nm, 15nm and even 14nm, the cells became so small that there were only a few electrons in each cell and cross-talk issues made further shrinks very difficult… Read More


Samsung Details Foundry Roadmap

Samsung Details Foundry Roadmap
by Scotten Jones on 06-09-2017 at 10:00 am

Samsung recently held a meeting where they laid out a detailed roadmap for their foundry business. On Tuesday June 1st, Daniel Nenni and myself had an interview with Kelvin Low, senior director of foundry marketing and business development to discuss the details of Samsung’s plans.… Read More


14nm 16nm 10nm and 7nm – What we know now

14nm 16nm 10nm and 7nm – What we know now
by Scotten Jones on 04-07-2017 at 7:00 am

Last week Intel held a manufacturing day where they revealed a lot of information about their 10nm process for the first time and information on competitor processes continues to slowly come out as well. I thought it would be useful to summarize what we know now, especially since some of what Intel announced was different than what… Read More


Shootout at 22nm!

Shootout at 22nm!
by Scotten Jones on 04-03-2017 at 4:00 pm

For an industry that drives improvement at an exponential rate it is funny how often something old is new again. Intel went into high volume production on 22nm in 2011, and TSMC and Samsung have both had 20nm technologies in production for several years. And yet, recently we have seen renewed interest in 22nm. GLOBALFOUNDRIES has… Read More


Intel Manufacturing Day: Nodes must die, but Moore’s Law lives!

Intel Manufacturing Day: Nodes must die, but Moore’s Law lives!
by Scotten Jones on 03-29-2017 at 4:00 pm

Yesterday I attended Intel’s manufacturing day. This was the first manufacturing day Intel has held in three years and according to Intel their most in depth ever.

Nodes must die
I have written several articles comparing process technologies across the leading-edge logic producers – GLOBALFOUNDRIES, Intel, Samsung… Read More


EUV is NOT Ready for 7nm!

EUV is NOT Ready for 7nm!
by Daniel Nenni on 02-27-2017 at 8:00 am

The annual SPIE Advanced Lithography Conference kicked off last night with vendor sponsored networking events and such. SPIE is the international society for optics and photonics but this year SPIE Advanced Lithography is all about the highly anticipated EUV technology. Scotten Jones and I are at SPIE so expect more detailedRead More


The 2017 Leading Edge Semiconductor Landscape

The 2017 Leading Edge Semiconductor Landscape
by Scotten Jones on 12-27-2016 at 6:00 pm

In early September of 2016 I published an article “The 2016 Leading Edge Semiconductor Landscape” that proved to be very popular with many views, comments and reposting’s. Since I wrote that article a lot of new data has become available enabling some projections to be replaced by actual values and new analysis… Read More


The Status and Future of FDSOI

The Status and Future of FDSOI
by Scotten Jones on 09-26-2016 at 12:00 pm

I recently took a look at the current status and future direction of FinFET based logic processes in my Leading Edge Logic Landscape blog. I thought it would be interesting to take a similar look at FDSOI and to compare and contrast the two processes. My Leading Edge Logic Landscape blog is available here.… Read More


TSMC 16nm, 10nm, 7nm, and 5nm Update!

TSMC 16nm, 10nm, 7nm, and 5nm Update!
by Daniel Nenni on 09-13-2016 at 4:00 pm

Word on the street is that TSMC is on schedule with 16FFC, 10nm and 7nm, which is a very big deal for the fabless semiconductor ecosystem. As Scotten Jones has illustrated in the graphic below, for the first time in the history of the semiconductor industry a pure-play foundry (TSMC) will have the process lead over Intel. And this is… Read More