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How to Bring Coherency to the World of Cache Memory

How to Bring Coherency to the World of Cache Memory
by Tom Simon on 07-11-2016 at 12:00 pm

As the size and complexity of System On Chip design has rapidly expanded in recent years, the need to use cache memory to improve throughput and reduce power has increased as well. Originally, cache memory was used to prevent what was then a single processor from making expensive off chip access for program or data memory. With the… Read More


21 months lining up OPNFV-on-ARM for telecom

21 months lining up OPNFV-on-ARM for telecom
by Don Dingee on 07-01-2016 at 4:00 pm

Telecom infrastructure is one area where X86 architecture hasn’t dominated historically. Infrastructure gear is spread across MIPS, Power, and SPARC architectures, with some X86, and a relative newcomer: ARM, already claiming 15% share. That’s a stunning figure considering only a bit less than 5 years ago… Read More


From Zero to IoT Prototype in One Month

From Zero to IoT Prototype in One Month
by Bernard Murphy on 06-30-2016 at 7:00 am

The best things in life may not always be free, but they don’t have to be incredibly difficult to get to. A challenge for IoT designers has been that their bubbling excitement over the potential of their new gizmo is quickly tempered by the complexities of actually building the hardware. Not exactly what they have come to expect in … Read More


ARM vs Intel: The New War Frontiers

ARM vs Intel: The New War Frontiers
by Prakash Mohapatra on 06-28-2016 at 12:00 pm

With Intel’s exit from smartphone processor market, the competitive zones are redefined with its rivalry with ARM. Is ARM’s domination the only reason for Intel’s exit? With no competing architecture, is ARM a monopoly in smartphone processor IP market? What are the new areas of competition between ARM and Intel? I will attempt… Read More


ARM and Mentor Enabling the Ecosystem for the Backbone of IoT

ARM and Mentor Enabling the Ecosystem for the Backbone of IoT
by Daniel Nenni on 06-24-2016 at 7:00 am

Charlene Marini (VP of ARM Segment Marketing) did a nice presentation at the ARM/Mentor Summit last month at the Mentor HQ in Fremont. I just got the slides so let me give you a quick summary from my notes. It was a very good presentation on IoT and emulation which in my mind is the new simulation. I also attended an IoT panel at #53DAC that… Read More


Webinar alert – ARM and Enea explore NFV

Webinar alert – ARM and Enea explore NFV
by Don Dingee on 06-22-2016 at 4:00 pm

In the Open Source IP panel at 53DAC, we explored the idea of workload-optimized servers. One panelist observation stuck with me: if one chooses to deviate from the Intel-based norm in a data center, you essentially have to spray paint a line around any boxes that don’t comply.… Read More


ARM sets up quagmire-free ecosystem for IoT

ARM sets up quagmire-free ecosystem for IoT
by Don Dingee on 06-10-2016 at 4:00 pm

Wandering around DAC this week, I found much of the discussion focused on the EDA community being at an inflection point. How do we get more design starts from new places with new ideas without jeopardizing existing business? It’s not as simple a transition as it sounds.… Read More


Highlights of the 22nm FD-SOI San Jose Presentations

Highlights of the 22nm FD-SOI San Jose Presentations
by Adele Hars on 06-08-2016 at 7:00 am

VLSIResearch FDSOI whybiztech SanJose16 534x610

This is part 2 (of 2) of my coverage of the recent FD-SOI Symposium in San Jose (April 2016), this time looking at the 22nm presentations by GlobalFoundries, ARM (finally!!), VLSI Research Inc and Sigma Designs. (Part 1 looked at the 28nm presentations.) Most are now available on the SOI Consortium website – click here to see the full… Read More


A Shot in the ARM for IoT

A Shot in the ARM for IoT
by Randy Smith on 06-03-2016 at 12:00 pm

I recently attended the IoT Developers Conference in Santa Clara, CA. There were clearly two major themes in the talks – security and low power. The volume market in IoT is in the edge node devices. These devices have two important characteristics. They acquire data which needs to be transmitted and they typically are battery-driven… Read More


ARM tests out TSMC 10FinFET – with two cores

ARM tests out TSMC 10FinFET – with two cores
by Don Dingee on 05-25-2016 at 4:00 pm

About 13 months ago, the leak blogs posted news of “Artemis” on an alleged ARM roadmap slide, supposedly a new 16FF ARM core positioned as the presumptive successor to the Cortex-A57. Now, we’re finding out what “Artemis” may actually be, inside a multi-core PPA test chip on TSMC 10FinFET.… Read More