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		The use of hard masks instead of photoresist for the Extension implant is an effective way to optimize the amount of dopant that is retained along the fin sidewalls for those fins that border along photoresist edges (as discussed in Part 1 of this series).
However, hard masks do nothing to address the dominant problem driving steeper… Read More 
	 
	
	
	
		
	
		
			
		
	
	
		
		
	
	
	
		The 3D character of FinFET transistor structures pose a range of unique fabrication problems that can make it challenging to get these devices to yield. This is especially true for the all-important Extension implant that is put in place just prior to the nitride spacer formation.
The Extension implant is a central component of… Read More 
	 
	
	
	
		
	
		
			
		
	
	
		
		
	
	
	
		This year TSMC did a FinFET victory lap with the success of 16nm, 12nm, 10nm, and 7nm. It really is well deserved. Even though TSMC credits the ecosystem and customers, I credit TSMC and their relationship with Apple since it has pushed us all much harder than ever before. TSMC CEO C.C. Wei summed it up nicely in his keynote: Innovation,… Read More 
	 
	
	
	
		
	
		
			
		
	
	
		
		
	
	
	
		Physical IC design is a time consuming and error prone process that begs for automation in the form of clever EDA tools that understand the inter-relationships between logic synthesis, IC layout, test and sign-off analysis. There’s even an annual conference called ISPD – International Symposium on Physical Design… Read More 
	 
	
	
	
		
	
		
			
		
	
	
		
		
	
	
	
		TSMC and Samsung continue to raise the competitive bar for FinFET foundry market share with dueling announcements this week. As I mentioned previously in the blog Semiconductor Foundry Landscape Update 2019, FinFETs are the market to watch with the coming onslaught of 5G and AI chips on the edge, in the cloud, and in our autonomous… Read More 
	 
	
	
	
		
	
		
			
		
	
	
		
		
	
	
	
		Last week TSMC announced the availability of its complete 5nm design infrastructure that enables SoC designers to implement advanced mobile and high-performance computing applications for the emerging 5G and AI driven markets. This fifth generation 3D FinFET design infrastructure includes technology files, PDKs (Process… Read More 
	 
	
	
	
		
	
		
			
		
	
	
		
		
	
	
	
		The semiconductor foundry landscape changed in 2018 when GLOBALFOUNDRIES and Intel paused their leading edge foundry efforts. Intel quietly told partners they would no longer pursue the foundry business and GF publicly shut down their 7nm process development and pivoted towards existing process nodes while trimming headcount… Read More 
	 
	
	
	
		
	
		
			
		
	
	
		
		
	
	
	
		EDA is big on growth through acquisition, being acquired many times throughout my career I know this by experience. In fact, we have a wiki that tracks EDA Mergers and Acquisitions and it is the most viewed wiki on SemiWiki.com with 101,918 views thus far.
In March of 2017 ANSYS acquired CLK Design Automation which did timing variation… Read More 
	 
	
	
	
		
	
		
			
		
	
	
		
		
	
	
	
		At SemiWiki we usually don’t write about the press releases we are sent. However, a recent press release by eSilicon caught my eye and prompted me to call Mike Gianfagna, eSilicon Vice President of Marketing. The press release is not just about one thing, rather it focuses on a number of interesting things that together show their… Read More 
	 
	
	
	
		
	
		
			
		
	
	
		
		
	
	
	
		In an ANSYS seminar held at DesignCon 2019, Dr. Larry Williams, ANSYS Director of Technology, outlined how 5G design innovation can be accelerated through simulation. He posited that 5G will become a general-purpose technology that affects an entire economy, drastically alter societies and unleash a cascade of complementary… Read More 
	 
	
	
	
	
		
	 
	
	
 
		 
		
		
	
Intel to Compete with Broadcom and Marvell in the Lucrative ASIC Business