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WP_Term Object
(
    [term_id] => 89
    [name] => FinFET
    [slug] => finfet
    [term_group] => 0
    [term_taxonomy_id] => 89
    [taxonomy] => category
    [description] => 
    [parent] => 0
    [count] => 226
    [filter] => raw
    [cat_ID] => 89
    [category_count] => 226
    [category_description] => 
    [cat_name] => FinFET
    [category_nicename] => finfet
    [category_parent] => 0
    [is_post] => 
)

Semicon West – The FDSOI Ecosystem

Semicon West – The FDSOI Ecosystem
by Scotten Jones on 07-21-2017 at 12:00 pm

At Semicon West last week I attended presentations by Soitec and CEA Leti, and had breakfast with CEA Leti CEO Marie Semeria, key members of the Fully Depleted Silicon On Insulator (FDSOI) ecosystem. I have also seen some comments in the SemiWiki forum lately that make me believe there is some confusion on the roles of different companies… Read More


Standard Node Trend

Standard Node Trend
by Scotten Jones on 07-15-2017 at 4:00 pm

I have previously published analysis’ converting leading edge logic processes to “standard nodes” and comparing standard nodes by company and time. Recently updated details on the 7nm process node have become available and in this article, I will revisit the standard node calculations and trends.… Read More


GlobalFoundries 7nm and EUV Update!

GlobalFoundries 7nm and EUV Update!
by Daniel Nenni on 06-13-2017 at 7:00 am

Scott Jones and I had the opportunity to talk again with Gary Patton, GlobalFoundries CTO and SVP of R&D for a quick update on 7nm and EUV. Gary has been at GF for two years now with more than 500 other technologists from the IBM semiconductor acquisition. 7nm is the first IBM based process from GF (14nm was licensed from Samsung),… Read More


Design Rule Development Platform @ #54DAC!

Design Rule Development Platform @ #54DAC!
by Daniel Nenni on 06-12-2017 at 12:00 pm

While some might have expected the exponential growth in design rules number and complexity to cool down a little, it looks as if these are only heating up more. The multiplicity of technology nodes, lithography options, , fundamental technology options (Bulk, FD-SOI, FinFET), different process flavors and specific applications,… Read More


Shootout at 22nm!

Shootout at 22nm!
by Scotten Jones on 04-03-2017 at 4:00 pm

For an industry that drives improvement at an exponential rate it is funny how often something old is new again. Intel went into high volume production on 22nm in 2011, and TSMC and Samsung have both had 20nm technologies in production for several years. And yet, recently we have seen renewed interest in 22nm. GLOBALFOUNDRIES has… Read More


Intel Manufacturing Day: Nodes must die, but Moore’s Law lives!

Intel Manufacturing Day: Nodes must die, but Moore’s Law lives!
by Scotten Jones on 03-29-2017 at 4:00 pm

Yesterday I attended Intel’s manufacturing day. This was the first manufacturing day Intel has held in three years and according to Intel their most in depth ever.

Nodes must die
I have written several articles comparing process technologies across the leading-edge logic producers – GLOBALFOUNDRIES, Intel, Samsung… Read More


Samsung Should Just Buy eSilicon Already!

Samsung Should Just Buy eSilicon Already!
by Daniel Nenni on 03-22-2017 at 12:00 pm

As you all know I’m a big fan of the ASIC business dating back to the start of the fabless semiconductor transformation where anybody could send a design spec to an ASIC company and get a chip back. The ASIC business model also started the smart phone revolution when Samsung built the first Apple SoCs for the iPhones and iPads.

Today … Read More


Succeeding with 56G SerDes, HBM2, 2.5D and FinFET

Succeeding with 56G SerDes, HBM2, 2.5D and FinFET
by Daniel Nenni on 03-17-2017 at 4:00 pm

eSilicon presented their advanced ASIC design capabilities at a seminar last Wednesday evening. This event was closed to the press, bloggers and analysts, but I managed to get some details from a friend who attended. The event title was: “Advanced ASICs for the Cloud-Computing Era: Succeeding with 56G SerDes, HBM2, 2.5D and FinFETRead More


TSMC Talks About 22nm, 12nm, and 7nm EUV!

TSMC Talks About 22nm, 12nm, and 7nm EUV!
by Daniel Nenni on 03-16-2017 at 12:00 pm

The TSMC Symposium was jam-packed this year with both people and information. I had another 60 minutes of fame in the Solido booth where I signed 100 books, thank you to all who stopped by for a free book and a SemiWiki pen. SemiWiki bloggers Tom Dillinger and Tom Simon were also there so look for more TSMC Symposium blogs coming in the… Read More