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Timing Analysis for Embedded FPGA’s

Timing Analysis for Embedded FPGA’s
by Tom Dillinger on 10-25-2017 at 7:00 am

The initial project planning for an SoC design project faces a difficult engineering decision with regards to the “margin” that should be included as part of timing closure. For cell-based blocks, the delay calculation algorithms within the static timing analysis (STA) flow utilize various assumptions to replaceRead More


Embedded FPGA IP as a Post-Silicon Debugger

Embedded FPGA IP as a Post-Silicon Debugger
by Tom Dillinger on 09-08-2017 at 12:00 pm

The hardware functionality of a complex SoC is difficult to verify. Embedded software developed for a complex, multi-core SoC is extremely difficult to verify. An RTOS may need to be ported and validated. Application software needs to be developed, and optimized for performance. Sophisticated methodologies are employed to… Read More


Embedded FPGA Blocks as Functional Accelerators (AMBA Architecture, with FREE Verilog Examples!)

Embedded FPGA Blocks as Functional Accelerators (AMBA Architecture, with FREE Verilog Examples!)
by Tom Dillinger on 07-20-2017 at 7:00 am

A key application for embedded FPGA (eFPGA) technology is to provide functionality for specific algorithms — as the throughput of this implementation exceeds the equivalent code executing on a processor core, these SoC blocks are often referred to as accelerators. The programmability of eFPGA technology offers additional… Read More


Embedded FPGA IP update — 2nd generation architecture, TSMC 16FFC, and a growing customer base

Embedded FPGA IP update — 2nd generation architecture, TSMC 16FFC, and a growing customer base
by Tom Dillinger on 05-31-2017 at 12:00 pm

Regular Semiwiki readers are aware that embedded FPGA (eFPGA) IP development is a rapidly growing (and evolving) technical area. The applications for customizable and upgradeable logic in the field are many and diverse — as a result, improved performance, greater configurable logic capacity/density, and comprehensive… Read More


The eFPGA Market is Heating Up!

The eFPGA Market is Heating Up!
by Daniel Nenni on 05-22-2017 at 7:00 am

It is nice to see an emerging market successfully emerge for a change. With embedded FPGAs we are way past test chips and are now seeing tape-outs and silicon in a variety of applications. I’m not sure what the current market estimate of eFPGA is just yet but they align nicely with the $30B+ micro controller market. Market studies have… Read More


What’s better than silicon-proven IP? Lab bench-proven!

What’s better than silicon-proven IP? Lab bench-proven!
by Tom Dillinger on 03-17-2017 at 12:00 pm

The SoC industry depends upon the availability of validated IP. SoC designs require a huge investment, and assume the external IP that is licensed from outside parties satisfies all functional and electrical specifications. To support that requirement, IP providers typically pursue a strategy to demonstrate their designs… Read More


Power and Performance Optimization for Embedded FPGA’s

Power and Performance Optimization for Embedded FPGA’s
by Tom Dillinger on 02-22-2017 at 12:00 pm

Last month, I made a “no-brainer” forecast that 2017 would be the year in which embedded FPGA (eFPGA) IP would emerge as a key differentiator for new SoC designs (link to the earlier article here).

The fusion of several technical and market factors are motivating design teams to incorporate programmable logic functionality… Read More


DARPA Flex Logix and TSMC!

DARPA Flex Logix and TSMC!
by Daniel Nenni on 01-23-2017 at 10:00 am

When I first saw emerging semiconductor IP company Flex Logix actively involved with TSMC I knew something big was coming and boy was I right. DARPA announced today that an agreement is in place with Flex Logix to develop EFLX eFPGA technology on TSMC 16FFC for use by companies or Government agencies designing chips for the US Government.… Read More


Bringing the Semiconductor IP Community Together!

Bringing the Semiconductor IP Community Together!
by Daniel Nenni on 11-23-2016 at 4:00 pm

Next week is the first REUSE Semiconductor IP Tradeshow and Conference at the Computer History Museum in Silicon Valley. The presentation abstracts are up now and there are a few I want to highlight as they are companies that we work with on SemiWiki.… Read More