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Is it possible to find and prioritize holes in coverage through AI-based analytics on coverage data? Paul Cunningham (GM, Verification at Cadence), Jim Hogan and I continue our series on research ideas. As always, feedback welcome.
The Innovation
This month’s pick is Using Machine Learning Clustering To Find Large Coverage … Read More
Most large electronics companies take a divide and conquer approach to projects, with clear division lines set between HW and SW engineers, so quite often the separate teams have distinct methodologies and ways to design, document, communicate and save a BoM. This division can lead to errors in the system development process,… Read More
Pulsic recently announced its new “freemium” product Animate Preview and we had the chance to chat with Mark Williams, President and CEO of Pulsic. Mark explained details of the product and the new business model that could change the direction of the traditional EDA business model structure.
What brought you to the semiconductor… Read More
In 2019 I was involved in a major project to move all our engineering and financial systems to the cloud. We succeeded in this endeavor, but it wasn’t easy. We faced a lot of infrastructure challenges during our journey. The freedom from facility management and capital budgeting offered by the cloud was significant, however. If … Read More
Arteris IP and Magillem recently tied the knot, creating a merger of Network-on-Chip (NoC) and related Intellectual Property (IP) with a platform known for IP-XACT based SoC integration and related support. This is interesting to me because I’m familiar with products and people in both companies. I talked to Kurt Shuler, vice… Read More
I recently watched a webinar titled “How to accelerate power-aware simulation debug with Synopsys’ VC LP” that was presented by Ashwani Kumar Dwivedi senior applications engineer at Synopsys. Watching the webinar made me reminisce how design verification has evolved over the years. A long time ago, static verification started… Read More
After an incredible year for SemiWiki I spent much of January breaking down 2020 with our sponsoring companies. Some had a down year, some had a flat year, but quite a few had remarkable years. One standout company is SmartDV which recorded a 51% revenue increase, so the important question is why?
Reasons:
SmartDV covers one of the… Read More
Let’s face it, AI is everywhere. From the cloud to the edge to your pocket, there is more and more embedded intelligence fueling efficiency and features. It’s sometimes hard to discern where human interaction ends, and machine interaction begins. The technology that underlies all this is quite complex and daunting to understand.… Read More
.The UVM standard was first released by Accellera 10 years ago this month and is now by far the leading methodology for functionally verifying logic designs, especially at the block level. As I write, DVCon fast approaches so I talked to Tom Fitzpatrick, Verification Technologist at Siemens EDA (Mentor Graphics) for a perspective.… Read More
Sathyam has over 35 years of experience in company management, R&D management and software development in Electronic Design Automation (EDA) (mostly) and PCB Manufacturing. He has headed companies, global engineering and marketing organizations in Forture-500 and in startups companies to introduce innovative and … Read More
High-NA’s Obituary Was Premature