Free webinar – Accelerating data processing with FPGA fabrics and NoCs

Free webinar – Accelerating data processing with FPGA fabrics and NoCs
by Tom Simon on 10-14-2019 at 10:00 am

FPGAs have always been a great way to add performance to a system. They are capable of parallel processing and have the added bonus of reprogramability. Achronix has helped boost their utility by offering on-chip embedded FPGA fabric for integration into SoCs. This has had the effect of boosting data rates through these systems… Read More


Mentor’s Questa verification tools now run on 64-bit ARM based servers

Mentor’s Questa verification tools now run on 64-bit ARM based servers
by Tom Simon on 10-10-2019 at 10:00 am

The server market has been undergoing changes in the last few years. The traditional go-to for server processors had been x86 based chips from Intel or AMD. However, if you go on Amazon AWS looking for EC2 instances, you will see the “A1” instance type, which is an ARM based instance. This is not what you might think at first. The A1 instance… Read More


Functional Safety ARC Processor IP will speed automotive system design

Functional Safety ARC Processor IP will speed automotive system design
by Tom Simon on 10-09-2019 at 10:00 am

In the automotive space you can’t even get out of the starting gate without Functional Safety (FS). All electronic system that go into cars must have ISO 26262 certification. However, this is not something you slap on after the fact. From the ground up the requirements for ISO 26262 must be considered and the proper processes must… Read More


Webinar – AI/ML SoC Memory and Interconnect IP Perspectives

Webinar – AI/ML SoC Memory and Interconnect IP Perspectives
by Tom Simon on 10-08-2019 at 10:00 am

For decades development work on Artificial Intelligence (AI) and Machine Learning (ML) was done on traditional CPUs and memory configurations. Now that we are in the “hockey stick” upturn in deployment of AI and ML, the search is on for the most efficient types of processing architectures. The result is a wave of development for… Read More


Synopsys and Infineon prepare for expanding AI use in automotive applications

Synopsys and Infineon prepare for expanding AI use in automotive applications
by Tom Simon on 10-03-2019 at 10:38 am

We all know that cars are using processors for many tasks, but it is easy to fail to comprehend just how many there are in a typical modern car. Browsing through the Infineon AURIX automotive processor application guide, you can start to see just how pervasive processors are. The AURIX processors are specifically designed for automotive… Read More


Cadence Celsius Heats Up 3D System-Level Electro-Thermal Modeling Market

Cadence Celsius Heats Up 3D System-Level Electro-Thermal Modeling Market
by Tom Simon on 09-24-2019 at 6:00 am

A few years back people were saying that the “EDA” problem was solved and that design tools had become commodity. At the same time people hailed ADAS, smart homes, mobile communication and AI as the frontiers of electronics.  Perhaps it could be said that layout tools, routers, placers, and circuit simulators had largely matured… Read More


Webinar: Using Embedded FPGA to Improve Machine Learning SOCs

Webinar: Using Embedded FPGA to Improve Machine Learning SOCs
by Tom Simon on 08-22-2019 at 6:00 am

By its very definition, machine learning (ML) hardware requires flexibility. In turn, each ML application has its own fine grain requirements. Specific hardware implementations that include specialized processing elements are often desirable for machine learning chips. At the top of the priority list is parallel processing.… Read More


Can a hierarchical Test flow be used on a flat design?

Can a hierarchical Test flow be used on a flat design?
by Tom Simon on 08-15-2019 at 10:00 am

It is pretty common for physical layout to work from a flattened hierarchy for blocks or even full chips, even though the front-end design starts with a hierarchical representation. This was not always the case. Way back when, the physical layout matched the logical hierarchy during the design process. Of course, this led to all… Read More


Adding CDM Protection to a Real World LNA Test Case

Adding CDM Protection to a Real World LNA Test Case
by Tom Simon on 08-06-2019 at 6:00 am

In RF designs Low Noise Amplifiers (LNA) play a critical role in system operation. They simultaneously need to be extremely sensitive and noise free, yet also must be able to withstand strong signal input without distortion. LNA designers often struggle to meet device performance specifications. Their task is further complicated… Read More


56th DAC – In Depth Look at Analog IP Migration from MunEDA

56th DAC – In Depth Look at Analog IP Migration from MunEDA
by Tom Simon on 07-31-2019 at 10:00 am

Every year at DAC, in addition to the hubbub of the exhibit floor and the relatively short technical sessions, there are a number of tutorials that dive in depth into interesting topics. At the 56th DAC in Las Vegas this year, MunEDA offered an interesting tutorial on Analog IP migration and optimization. This is a key issue for large… Read More