For years, advanced packaging has been described mostly in planar terms: chiplets placed side by side, connected through interposers, bridges, redistribution layers, substrates, and short-reach electrical links. This view remains important. It supports today’s GPU, HBM, chiplet, and 2.5D integration architectures.… Read More
Author: Moh Kolb
A tower-like heterogeneous packaging architecture for the AI era
From Evidence to Authority: Bounded Gate Authority for Governed Semiconductor Realization
Advanced semiconductor systems are no longer limited by a single engineering domain. They are constrained by the convergence of many interdependent vectors: silicon nodes, advanced packaging architectures, substrate materials, platform PCBs, power-delivery networks, thermal behavior, manufacturing variation, firmware… Read More
Convergence Evidence Maturity Hierarchy: From Raw Data to Convergence-Authoritative Evidence
The semiconductor industry is generating more engineering data than ever before.
This article follows the previously published GFL and TCG foundation pieces. GFL introduced the lifecycle-governance problem. TCG clarified why observable or interoperable data is not automatically trustworthy convergence evidence. CEMH… Read More
Trusted Convergence Governance: Preserving Admissibility Integrity Across Heterogeneous Semiconductor Systems
As semiconductor systems evolve toward heterogeneous integration, chiplets, 2.5D and 3D packaging, distributed observability, runtime adaptation, Fleet Learning, and lifecycle convergence governance, the industry is entering a fundamentally new operational reality.
Convergence decisions are no longer driven only… Read More
Closing the Silicon Realization Gap: From Static DFM to Governance for Lifecycle (GFL)
The semiconductor industry has achieved extraordinary mastery in silicon signoff. Modern EDA environments can now optimize timing closure, physical verification, IR/EM behavior, routing density, thermal interaction, and increasingly even design-space exploration through AI-assisted implementation flows. Crossing… Read More
Beyond Tool Interoperability: The Emerging Governed Convergence Problem in Semiconductor Design
The semiconductor industry has spent decades optimizing tools. Today, however, the central challenge is no longer whether individual tools are powerful enough. The real question is whether increasingly specialized tools, domains, models, and organizations can still converge coherently into a manufacturable, reliable,… Read More
Closing the Reality Gap: A New Architecture for 1.8-Tb/s Chiplet Governance
Dr. Moh Kolbehdari is a Senior Lead Architect at Socionext, where he specializes in the industrialization of high-performance AI chiplets and 1.8-Tb/s interconnects. With over two decades of experience in SI/PI, electromagnetic field theory, and system-level architecture, he has been a pivotal force in bridging the gap between… Read More
Available Is Not In Control: Balancing Output, Quality, and Risk in High-Volume Fabs