Webinar: Electrothermal Signoff for 2.5D and 3D IC Systems

Webinar: Electrothermal Signoff for 2.5D and 3D IC Systems
by Mike Gianfagna on 02-08-2021 at 6:00 am

Webinar Electrothermal Signoff for 2.5D and 3D IC Systems

The move from single-chip design to system-in-package design has created many challenges. The rise of 2.5D and 3D technology has set the stage for this. Beyond the modeling requirements and the need for ecosystem collaboration to get those models, there is a significant challenge in understanding the data. The only way to truly… Read More


ESD Alliance and IEEE CEDA Announce a New Recognition Program – the Phil Kaufman Hall of Fame

ESD Alliance and IEEE CEDA Announce a New Recognition Program – the Phil Kaufman Hall of Fame
by Mike Gianfagna on 02-03-2021 at 10:00 am

Phil Kaufman Award Winners

Anyone even remotely associated the EDA industry will know about the Phil Kaufman award. Every industry has its ultimate recognition – the Academy Awards and the Grammys are familiar ones in pop culture. The Nobel Prize gets a bit geekier and the Morris Chang award from the GSA is geekier still. If you’re an EDA geek, the Phil Kaufman… Read More


HCL Provides an On-Ramp to the Amazon Elastic Compute Cloud for HCL Compass

HCL Provides an On-Ramp to the Amazon Elastic Compute Cloud for HCL Compass
by Mike Gianfagna on 01-25-2021 at 10:00 am

HCL Provides an On Ramp to the Amazon Elastic Compute Cloud for HCL Compass

Last August I detailed a webinar about HCL Compass, a tool that provides low-code/no-code change management capability for enterprise scaling, process customization and control to accelerate project delivery and increase developer productivity. There is a lot of activity these days to migrate various enterprise applications… Read More


Samtec Lets You Learn from Home with a Great Webinar Lineup

Samtec Lets You Learn from Home with a Great Webinar Lineup
by Mike Gianfagna on 01-20-2021 at 10:00 am

Samtec Lets You Learn from Home with a Great Webinar Lineup

Work from home (WFH) has become a normal occurrence this past year. “Do you work from home?”  “Of course, where else?” Samtec is taking the whole work from home thing up a notch with a new webinar lineup for 2021. Back by popular demand, they are launching a new series of educational webinars. Started last year, the gEEk SpEEk Webinar… Read More


Siemens EDA is Applying Machine Learning to Back-End Wafer Processing Simulation

Siemens EDA is Applying Machine Learning to Back-End Wafer Processing Simulation
by Mike Gianfagna on 01-18-2021 at 6:00 am

Siemens EDA is Applying Machine Learning to Back End Wafer Processing Simulation

There’s a lot to unpack in the title of this post. First, Siemens EDA is the new name for Mentor, a Siemens Business. The organization continues to operate as part of Siemens Digital Industries Software.  The organization has released a white paper that describes research done with the American University of Armenia. The work examines… Read More


ESD Alliance Report for Q3 2020 Presents an Upbeat Snapshot That is Up and to the Right

ESD Alliance Report for Q3 2020 Presents an Upbeat Snapshot That is Up and to the Right
by Mike Gianfagna on 01-12-2021 at 10:00 am

ESD Alliance Report for Q3 2020 Presents an Upbeat Snapshot That is Up and to the Right

The Electronic System Design (ESD) Alliance (a SEMI Technology Community) recently released their regular report on EDA revenue for Q3, 2020 . While the report is a normal occurrence, the numbers in this particular report are anything but normal. I have been reviewing these reports for many years, and I honestly can’t remember… Read More


Webinar: Rescale is Providing an On-Ramp to the Hybrid Cloud for Chip Design

Webinar: Rescale is Providing an On-Ramp to the Hybrid Cloud for Chip Design
by Mike Gianfagna on 01-11-2021 at 6:00 am

Webinar Rescale is Providing an On Ramp to the Hybrid Cloud for Chip Design

We all know that design complexity is increasing at a fast pace. There’s always more analysis to run on larger and larger volumes of data. During tapeout, these demands can grow by an order of magnitude. Successful design projects need to add huge amounts of CPU, memory and storage for short bursts of time during tapeout to meet their… Read More


PLDA is at the Leading Edge with Advances in Both PCIe 5.0 and CXL

PLDA is at the Leading Edge with Advances in Both PCIe 5.0 and CXL
by Mike Gianfagna on 01-05-2021 at 6:00 am

PLDA is at the Leading Edge with Advances in Both PCIe 5.0 and CXL

There are significant advances in communication protocols happening all around us. The Peripheral Component Interconnect Express (PCIe) Gen 5 standard is delivering the needed device-to-device performance to support artificial intelligence and machine learning applications as well as cloud-based workloads. The rapidly… Read More


SmartDV Expands Its Design IP Portfolio with an Acquisition

SmartDV Expands Its Design IP Portfolio with an Acquisition
by Mike Gianfagna on 12-29-2020 at 6:00 am

SmartDV Expands Its Design IP Portfolio with an Acquisition

Back in April, I posted a blog about SmartDV, The Quiet Giant in Verification IP and More. This is a story about the “more” part of that statement. Acquisition activity in the semiconductor sector has been quite brisk this year. A bright spot in what could otherwise be a sometimes-overwhelming series of bad news. Acquisition has … Read More


Analog Bits is Taking the Virtual Holiday Party up a Notch or Two

Analog Bits is Taking the Virtual Holiday Party up a Notch or Two
by Mike Gianfagna on 12-25-2020 at 6:00 am

Analog Bits Takes the Virtual Holiday Party Up a Notch or Two

As 2020 comes to a close, I hear a lot of chatter about virtual meeting fatigue; “I’m Zoomed out”. We’ve all attended virtual versions of conferences this year with various degrees of success. Overall, I have to say these events are getting better. Semiconductor and EDA folks have a way of adapting and inventing, and it’s showing … Read More