In a move poised to accelerate the integration of open-source processor architectures into resource-constrained devices, semiconductor IP provider CAST, Inc. unveiled its Catalyst™ Program on October 22, 2025, at the RISC-V Summit in Santa Clara, California. This initiative addresses a persistent pain point for embedded… Read More
Webinar – The Path to Smaller, Denser, and Faster with CPX, Samtec’s Co-Packaged Copper and OpticsFor markets such as data center, high-performance computing,…Read More
Webinar – IP Design Considerations for Real-Time Edge AI SystemsIt is well-known that semiconductor growth is driven…Read More
WEBINAR: Design and Stability Analysis of GaN Power Amplifiers using Advanced Simulation ToolsWhy should high frequency circuit designers consider stability…Read More
Visualizing hidden parasitic effects in advanced IC design By Omar Elabd As semiconductor designs move below…Read More
Statically Verifying RTL Connectivity with SynopsysMany years ago, not long after we first…Read MoreCEO Interview with Alex Demkov of La Luce Cristallina
Alex Demkov is co-founder and CEO of La Luce Cristallina. He is a distinguished figure in the field of materials physics, serving as a Professor at the University of Texas at Austin. With a prolific career marked by notable achievements, Alex boasts an impressive portfolio of 10 U.S. patents and many patent applications, showcasing… Read More
Podcast EP313: How proteanTecs Optimizes Production Test
Daniel is joined by Alex Burlak is Vice President of Test & Analytics at proteanTecs. With combined expertise in production testing and data analytics of ICs and system products, Alex joined proteanTecs in October, 2018. Before joining the company, Alex held a Senior Director of Interconnect and Silicon Photonics Product… Read More
IPLM Today and Tomorrow from Perforce
Today, Perforce IPLM stands at the intersection of data management, automation, and collaboration, shaping the way companies design the next generation of chips and systems. Looking ahead, its evolution will reflect the growing convergence of hardware, software, and AI-driven engineering.
Chiplets: Powering the Next Generation of AI Systems
AI’s rapid expansion is reshaping semiconductor design. The compute and I/O needs of modern AI workloads have outgrown what traditional SoC scaling can deliver. As monolithic dies approach reticle limits, yields drop and costs rise, while analog and I/O circuits gain little from moving to advanced process nodes. To sustain … Read More
Better Automatic Generation of Documentation from RTL Code
One technical topic I always find intriguing is the availability of links between documentation and chip design. It used to be simple: there weren’t any. Architects wrote a specification (spec) in text, in Word if they had PCs, or using “troff” or a similar format if they were limited to Unix platforms. Then the hardware designers… Read More
FD-SOI: A Cyber-Resilient Substrate for Secure Automotive Electronics
The paper highlights how Fully Depleted Silicon-On-Insulator (FD-SOI) technology provides a robust defense against Laser Fault Injection (LFI), a precise, laboratory-grade attack method that can compromise cryptographic and safety-critical hardware. As vehicles become increasingly digital and connected, with dozens… Read More
Podcast EP312: Approaches to Advance the Use of Non-Volatile Embedded Memory with Dave Eggleston
Daniel is joined by Dave Eggleston is senior business development manager at Microchip with a focus on licensing SST SuperFlash technology. Dave’s extensive background in Flash, MRAM, RRAM, and storage is built on 30+ years of industry experience. This includes serving as VP of Embedded Memory at GLOBALFOUNDRIES, CEO… Read More
Learning from In-House Datasets
At a DAC Accellera panel this year there was some discussion on cross-company collaboration in training. The theory is that more collaboration would mean a larger training set and therefore higher accuracy in GenAI (for example in RTL generation). But semiconductor companies are very protective of their data and reports of copyrighted… Read More
ASU Silvaco Device TCAD Workshop: From Fundamentals to Applications
The ASU-Silvaco Device Technology Computer-Aided Design Workshop is a pivotal educational and professional development event designed to bridge the gap between theoretical semiconductor physics and practical device engineering. Hosted by Arizona State University in collaboration with Silvaco, a leading provider of … Read More


The AI PC: A New Category Poised to Reignite the PC Market