Design Manager – CPU/HW Design

This is an exciting opportunity to join a fast-growing company with a unique position in the industry. If you are proactive, you are not afraid to voice your own opinion, and are looking for a job where you can be creative, we think you will work well with us. Together with our well-organized and highly collaborative international teams, located in the Czech Republic, Germany, France, Spain and the UK, you will be responsible for the development of the core or of the accelerator microarchitecture.

YOUR ROLE:

• Be a leading member of our design team providing a leading role on a significant part of the CPU microarchitecture
• Determine the need for training and talent development
• Hire and build/scale a design team
• Ensure projects have the support of upper management
• Provide clear and concise instructions to engineering design teams
• Supervise the work of the local design teams
• Be responsible for the microarchitecture definition and implementation of RISC-V processors and components and leading a small team to deliver
• Processor development in our architecture language (CodAL)
• Work closely with the verification team on verification planning, debugging, and final sign-off
• Synthesis (timing and area optimizations) to ensure PPA targets can be met
• Participate in and drive design and verification reviews

YOU SHOULD HAVE:

• Engineering management experience
• Over 10 years recent and relevant experience with at least one HDL (VHDL/Verilog/SystemVerilog)
• Advanced knowledge of CPU architecture
• Experience with digital circuit simulation
• User knowledge of Linux
• Knowledge of scripting languages (Shell, Bash, Python) and versioning tools (Git, SVN)
• Analytical thinking, self-sufficiency, team collaboration
• Ability to work across teams to debug issues and find root causes
• Proven track record of working in fast paced innovative work environment.

NICE-TO-HAVE:

• Knowledge of RISC-V instruction set
• Advanced knowledge of computer systems and architecture
• Experience with Synthesis, Design for Test and Timing Analysis
• Knowledge of C/C++
• Experience with Formal Verification concepts

• Opportunity to work with RISC-V, computer architecture of the future
• Working on innovative IoT processors and unique processor optimization technology
• Participation in the whole development process from analysis to deployment
• Opportunity to collaborate  with experienced developers located in Germany, France, UK, Greece and Czech Republic
• Receptivity to your own innovations and ideas
• Freedom and trust from Codasip management
• Flexible working hours, including working from home
• Very competitive compensation package