DAC2025 SemiWiki 800x100
Semiconductor Expert Forum

Posted on

KLAC- Weak Guide-2023 will “drift down”-Not just memory weak, China & logic too

KLAC- Weak Guide-2023 will “drift down”-Not just memory weak, China & logic too
by Robert Maire on 02-06-2023 at 6:00 am
Categories: Lithography, Semiconductor Advisors, Semiconductor Services

KLAC Tencor SemiWiki

-Business will “drift down” over the course of 2023
-Not just memory is weak- China issue, foundry/logic slowing
-March guide worse than expected (Like Lam)
-Backlog likely saw push outs & cancelations but still long

Good quarter but weak guide

Much as we saw with Lam, KLA reported a beat on the December quarter but a weaker than expected guide on the March quarter as the industry is falling faster than most believe. Revenue came in at $3B with EPS of $7.38 versus street of$2.82 and EPS of $7.10. Guidance was for revenues of $2.35B +-$150M and EPS of $5.22+-$0.70 versus street of $2.55B and $5.89, similar to the miss in guide that Lam also reported

2023 will be H1 weighted

Management said that business would likely drift down through the year. Sounds like projects may have been pushed out and backlog will get reduced as we go through the year .
It obviously takes some time for the high rate of spend to slow.

Backlog still high but will drop

Management said that 45-50% of backlog was over 12 months in length. How stable the backlog is may be open to question as we will see pushes and pulls with more pushes than pulls as schedules get adjusted. While KLA’s backlog is second only to ASML they are more vulnerable to push outs and delays or cancellations of quicker turn products.

Its not just memory issues but China and foundry/logic as well

China business looks to be close to cut in half from levels prior to the embargo. While Lam may be the poster child for weak memory, KLA may be more impacted by the China embargo. The weak quarter out of Intel reminds us that foundry/logic is also weak though perhaps not down as sharply as memory or China. This “triple whammy” of memory, China & foundry/logic is obviously impacting all semi equipment makers with different segments impacting each participant differently

Length and depth of down cycle a great unknown

Management did not want to comment on the length or depth of the downturn other than to say that KLA should do better than most of their peers (with the obvious exception of ASML)

As we have said a while ago, we think 2023 is looking a lot like a write off with no real recovery until 2024 at the earliest. While KLA tends to have strong backlog, it could run out if the downturn lasts too long and then results will be a bit less predictable.

Welcome to reality

We think many investors do not believe the industry is in as bad a downturn as actually exists. Many ignored the dire guidance from Lam coupled with the very serious actions taken by the company to reduce costs which obviously wouldn’t have been taken unless there was a concern of a prolonged downturn.

While we didn’t hear specifically about layoffs from KLA, we are sure that they are selectively cutting expenses as they said they would “stabilize” spending which means reduce. This sounds like although things are not great, they are not as bad as they are at Lam

The stocks

With KLAC adding to Lam’s view that 2023 will not only be down but will be H1 weighted with continuing increasing weakness through the year, we are hardly motivated to buy any equipment stock akin to catching a falling knife.
We may see some false rallies as people may think the worst is over or Q1 is the bottom or other falsely optimistic views but we are in the midst of a good, old fashioned down cycle of the sort we haven’t seen in quite a while and some lesser experienced investors and analysts have never seen.

The long term secular trends remain as positive as ever but when they will return is anyone’s guess. In the mean time we could see this bouncing drift down the bottom of the cycle. Because this down cycle is not caused by a singular event, it is likely that we will need at least two of the three factors to improve before we see things move upward again.

KLA remains a nice house in a declining neighborhood but that doesn’t make us feel comfortable.

About Semiconductor Advisors LLC
Semiconductor Advisors is an RIA (a Registered Investment Advisor),
specializing in technology companies with particular emphasis on semiconductor and semiconductor equipment companies.
We have been covering the space longer and been involved with more transactions than any other financial professional in the space.
We provide research, consulting and advisory services on strategic and financial matters to both industry participants as well as investors.
We offer expert, intelligent, balanced research and advice. Our opinions are very direct and honest and offer an unbiased view as compared to other sources.

Also Read:

Hynix historic loss confirms memory meltdown-getting worse – AMD a bright spot

Samsung- full capex speed ahead, damn the downturn- Has Micron in its crosshairs

Lam chops guidance, outlook, headcount- an ugly, long downturn- memory plunges

Podcast EP142: The Drive Toward a More Sustainable Semiconductor Industry with EMD Electronic’s Anand Nambiar

Podcast EP142: The Drive Toward a More Sustainable Semiconductor Industry with EMD Electronic’s Anand Nambiar
by Daniel Nenni on 02-03-2023 at 10:00 am

Dan is joined by Anand Nambiar, Executive Vice President and Global Head of Semiconductor Materials at EMD Electronics, the North American Electronics business of Merck KGaA, Darmstadt, Germany. Anand has over 23 years’ experience in the semiconductor industry. His previous roles include Associate Director – Quality at Nikon Inc., Vice President of Operations at Cascade Microtech, Operations Director at AZ Electronic materials, and Managing Director of the Optronics Division at AZ Electronic Materials up to its acquisition by EMD Electronics, He has headed the semiconductor materials business for the past four years, overseeing its high-profile acquisition of Versum Materials. Anand has also led EMD Electronics’ Biopharma and Consumer Health business in India.

Dan explores the far-reaching impact EMD Electronics is having on the semiconductor industry with Anand. Current programs and their impact on power and greenhouse gas emissions, as well as new initiatives are discussed, with an eye toward building a cleaner and more sustainable semiconductor industry.

The views, thoughts, and opinions expressed in these podcasts belong solely to the speaker, and not to the speaker’s employer, organization, committee or any other group or individual.

Posted on

Hynix historic loss confirms memory meltdown-getting worse – AMD a bright spot

Hynix historic loss confirms memory meltdown-getting worse – AMD a bright spot
by Robert Maire on 02-03-2023 at 8:00 am
Categories: Semiconductor Advisors, Semiconductor Services
2 Comments

Memory Meltdown

-Hynix reports worst downturn in 10yrs – Already in red ink
-If the #2 memory maker is already negative what does it say?
-Confirms our view of 2023 write off- maybe 2024 better?
-Micron Mangled? & Toshiba Toast?- Buyers advantage

Hynix posts record $1.4B loss- worst in 10 years

Not all that surprisingly Hynix reported a loss making quarter. As the second largest memory chip maker after Samsung the drop was rather rapid.
The company also said the current memory situation is getting worse in the first quarter.

Hopes are for a 2024 recovery. Right now there is no firm evidence to point to other than the typical refrain from analysts in prior cycles saying that things will be better in 6 months (just wishful thinking at this point).
Hynix has obviously cut Capex and output.

Memory makers can slow but not stop output

Unlike OPEC and oil wells you just don’t hit the stop button at a fab. The vast majority of the cost of making any semiconductors is the depreciation of the equipment and bricks and mortar. The variable costs of consumables & labor is relatively small. This means that once a fab is built and complete you tend to run it at maximum capacity for the rest of its life as the marginal cost is low.

That marginal cost is also quite low as compared to the fully loaded cost so memory makers can get pushed to very low, loss making levels before they would ever consider stopping production. They can however, slow production by a small amount but all that means is that they will likely lose share to other memory makers who don’t slow.

Samsung can push pricing to the edge

All this suggests that dominant players, like Samsung, can push memory pricing down to the point that they can still tolerate (not happily) but below the level at which other competitors are profitable, thereby choking off the oxygen in the room. Obviously Hynix as the number two memory maker and Micron as a more distant 4th or 5th can get quickly pushed into the red.

This situation can persist for a long time if demand doesn’t recover.
As we have previously explained capacity can still increase without large capital expenditures due to technology advancement.

What is really needed to end the memory meltdown is for demand to increase…..the industry will never be able to cut production enough to get supply and demand back into balance….it will just not happen.

This suggests that the current memory issue is more of a macro economic demand recovery issue than an over supply issue….meaning that the resolution is not in the hands of the memory makers. The best they can do is take advantage of the situation which Samsung is doing.

A memory buyers market

It has been a memory sellers market for a very long time as makers have set pricing.

The tables have now turned

We have heard, from several different sources, that large buyers of memory are dictating terms and making deals at attractive pricing and terms. Memory makers desperate for buyers are willing to cut deals for large orders of memory at fixed terms to try to hold onto market share or gain share from others.

This implies that we may see some market share shifts created by the downturn as some makers will make deals and others not so.

AMD a minor bright spot in a dark industry

AMD posted better than expected results as they continue to do well and gain share. This stands in obvious contrast to Intel not that long ago. While this is good for AMD it is really just further proof of the importance of TSMC that produces the chips that are successful.

It says that TSMC continues to do a great job of execution as it completely dominates the industry.

This is not to say that AMD has nothing to do with its own success but just that TSMC remains “the man behind the curtain” for most successful tech companies such as AMD, Apple, Nvidia etc; etc;.

Micron, Toshiba & Hynix need further cuts

While memory makers be not be able to avoid red ink in the current memory meltdown they need to reduce the hemorrhaging as much as possible to extend the runway beyond the length of a long downturn.

This likely means more layoffs, more capex cuts, project cancelations.

It is also important for companies to have gas left in the tank for when the industry does finally recover so they can participate and not be left permanently wounded or dead. Even Yangtze memory in China has reported a 10% headcount reduction.

The stocks

Obviously Hynix is just more proof of what we already knew since June. The main difference is the underscoring of exactly how long and deep the memory downturn will be. We haven’t seen significant red ink in a very long time and in many cases longer ago than many investors actually can remember or have experience with so many may be in uncharted territory. We continue to warn investors that this will not be a “snap back” type of short lived downcycle as we have seen in brief respites of an otherwise bull tech market.

Companies that continue to ride above the fray include ASML and TSMC, although not cheap for a reason. We also warn investors that we have yet to know the bottom, at least in the memory market, and it is wrong to assume its in the next quarter or two.

About Semiconductor Advisors LLC

Semiconductor Advisors is an RIA (a Registered Investment Advisor),
specializing in technology companies with particular emphasis on semiconductor and semiconductor equipment companies. We have been covering the space longer and been involved with more transactions than any other financial professional in the space. We provide research, consulting and advisory services on strategic and financial matters to both industry participants as well as investors. We offer expert, intelligent, balanced research and advice. Our opinions are very direct and honest and offer an unbiased view as compared to other sources.

Also Read:

Lam chops guidance, outlook, headcount- an ugly, long downturn- memory plunges

ASML – Powering through weakness – Almost untouchable – Lead times exceed downturn

Where there’s Smoke there’s Fire: UCTT ICHR LRCX AMAT KLAC Memory

Posted on

Alphawave Semi at the Chiplet Summit

Alphawave Semi at the Chiplet Summit
by Daniel Nenni on 02-03-2023 at 6:00 am
Categories: Alphawave Semi, Chiplet, Events, IP

Alphawave Semi Chiplet Summit

The first annual Chiplet Summit was held last week in San Jose and I must say it exceeded my expectations, but I have some advice for the participating speakers and sponsoring companies. A good portion of the content was on WHY chiplets and not HOW. I think we have progressed passed this point and if we keep dwelling on it we will delay the HOW which is critical in moving a new technology forward.

Otherwise I was very impressed and will attend again next year, absolutely.

In regards to content, I would like to call out a company that I admire Alphawave Semi. Not only were they a gold sponsor, Alphawave presented some of the best content and not only can they explain HOW chiplets work they can actually implement chiplets for you in form of a completed ASIC.

Even though the event has passed you can speak directly to the Alphawave people on the topics they covered. We will be writing more about it as well once we go through the materials they have provided.

Alphawave Semi will be a Gold Sponsor at the inaugural Chiplet Summit 2023 located in San Jose, CA on January 24-26, 2023! Catch us at our booth to learn more about our industry leading D2D (Die-to-Die) IP along with our custom silicon expertise integrated into a foundation for prebuilt connectivity chiplets delivering connectivity at a higher bandwidth and lower power than traditional infrastructure solutions.

Chiplet experts from Alphawave Semi will also be participating at Chiplet Summit on panels covering high-speed on-chip interfaces to achieve high performance while avoiding high latency; considerations on cost, chip area, throughput, and support are key in making an interface flexible, comprehensive, and easy to integrate for chiplet interoperability; and how to create a business-friendly structure on chiplet development for a viable marketplace.

Alphawave Semi is a contributing member of the Universal Chiplet Interface Express (UCIe) group and will be discussing the benefits UCIe brings to the ecosystem and market in panel discussions.

Alphawave Semi’s AresCORE16 D2D Connectivity IP is a market leading extremely low-power, low-latency interface IP designed by Alphawave Semi for very high bandwidth connections between two dies that are on the same package and is just one of the ways Alphawave is accelerating the critical data infrastructure at the heart of our digital world.

Panel Chiplet Interfaces

Letizia Giuliano
Tuesday, January 24th | 08:30-Noon

High-speed on-chip interfaces are the key to making the chiplet idea work. High data rates are essential to achieve high performance and avoid high latency. The interfaces also must consume little chip area to avoid reducing the total level of integration, and they must add little to power or thermal budgets. Example buses such as Bunch-of-Wires (BoW) and Universal Chiplet Interface Express (UCIe) are already available. Designers must consider cost, chip area, throughput, and support when deciding which one to use for their specific applications. The interface must be flexible, comprehensive, and easy to integrate with a wide variety of chiplets.

Best Packaging for Chiplets Today

Daniel Lambalot
Thursday, January 26th | 9:00 – 10:00 AM

Packaging is one of the most difficult areas for chiplet designers. Packages must be capable of handling power and heat dissipation, be reasonably priced and small, and be rugged enough for standard applications. Issues of concern include who selects the package and how, which packages are best-suited to chiplet-based designs, what breakthroughs we can expect in packaging over the next few years, and what are the best tradeoffs among size, performance, features, and cost for the many types of packages available today.

Tutorial Chiplet Interfaces

Letizia Giuliano
Thursday, January 26th | 9:00-10:00 AM

The interface connecting chiplets is critical to chiplet-based design. It must be extremely fast, highly reliable, and very flexible. It must also be low-power and take little chip area. There are two major contenders: Universal Chiplet Interface Express (UCIe) from the UCIe Consortium and Bunch-of-Wires (BoW) from the Open Compute Project Foundation. Designers must determine which fits best in their applications, and which is most likely to develop a large support ecosystem

How To Make Chiplets A Viable Market

Clint Walker
Thursday, January 26th | 2:00-3:30 PM

Many articles have discussed how chiplet-based design could become a drop-in business in which designers select the chiplets they want from a marketplace. Obviously, such a concept depends on a viable market in which chiplet designers could make a reasonable return on their investment. Clearly there would have to be standards for chiplets so chip designers would know what they’re getting and how it would integrate into their devices. The chiplet would need to have a specification sheet lists its connections and its characteristics in a specific manner. The chiplet would also have to pass both security and interoperability tests. Clearly such a marketplace will take time to develop and will require an organization to oversee it.

About Alphawave Semi

Alphawave Semi is a global leader in high-speed connectivity for the world’s technology infrastructure. Faced with the exponential growth of data, Alphawave Semi’s technology services a critical need: enabling data to travel faster, more reliably and with higher performance at lower power. We are a vertically integrated semiconductor company, and our IP, custom silicon, and connectivity products are deployed by global tier-one customers in data centers, compute, networking, AI, 5G, autonomous vehicles, and storage. Founded in 2017 by an expert technical team with a proven track record in licensing semiconductor IP, our mission is to accelerate the critical data infrastructure at the heart of our digital world. To find out more about Alphawave Semi, visit: awavesemi.com

Also Read:

Alphawave IP is now Alphawave Semi for a very good reason!

High-End Interconnect IP Forecast 2022 to 2026

Integration Methodology of High-End SerDes IP into FPGAs

Die-to-Die IP enabling the path to the future of Chiplets Ecosystem

Posted on

Samsung- full capex speed ahead, damn the downturn- Has Micron in its crosshairs

Samsung- full capex speed ahead, damn the downturn- Has Micron in its crosshairs
by Robert Maire on 02-02-2023 at 2:00 pm
Categories: Samsung Foundry, Semiconductor Advisors, Semiconductor Services
12 Comments

Samsung Electronics

-Samsung said its not reducing its capex despite downturn
-A clear indication they want to take share/kill Micron & others
-Is the US government subsidizing predatory chip behavior?
-The last US memory chip maker is clearly threatened

Samsung announces worst results in 8 years

Samsung released its earnings which were the worst in eight years. But the news was not how bad the earnings were because we already knew the chip industry and specifically memory is in a sharp downturn.

The real news is confirmation of previous statements that Samsung is not slowing its record capital spending of $39B despite the fact that the industry is flooded in over supply.

This is akin to OPEC drilling new wells when the price of oil is plummeting. OPEC is clearly smart enough to know that when you are already in a hole, you stop digging.

That is unless you want to take advantage of the situation and be a predator.

We have seen this movie several times before

We mentioned several newsletters ago, that we have been in the chip business long enough to remember that the US had 7 memory manufacturers including notably Intel and IBM. It is also notable that we have lost memory manufacturers usually in the bottom of a memory cycle when the weaker players can’t cut it and collapse.

It takes nerves of steel to be in the memory business and aggressive attitude. We pointed out that many months ago Micron bailed out in the game of “chicken” with Samsung as Samsung has kept the pedal to the metal of its 18 wheeler of memory manufacturing versus Micron’s pick up truck.

The fact that Samsung is not slowing even though Micron caved in a long time ago can only mean that Samsung is out for blood and market share….thats the only rational answer….

Samsung can read balance sheets

If you read Micron’s balance sheet , they are in a net debt position going into a downturn with prices and profitability collapsing. What better time for Samsung to press its advantage than when a competitor is financially weak in an industry that requires rivers of cash (which Samsung still has).

This same movie has played out in prior cycles as larger memory makers drive out weaker competitors who can’t keep up. We don’t know what Micron’s access to cash will look like if we have a prolonged downturn which it seems we are about to see given that Samsung may not cooperate and slow down.

Is the US government subsidizing predatory behavior with Chips act?

Samsung is planning new fabs in the US and will likely get CHIPS Act money because of it. They have been promised both federal and local money for new fabs in Texas. Given that the CHIPS act has a limited lifetime Samsung might as well get government money while the getting is good.

The government is clearly incentivizing those with money in the semiconductor industry to spend it as you don’t get CHIPS Act money unless you ante up your money first and Samsung is one of the few with money to spend as Micron is under water and Intel just reported a very bad quarter.

So in effect , what we have is the US government, subsidizing and incentivizing Samsung to spend money in a downturn to the detriment to US based competitors such as Micron who don’t have the money to spend in order to get CHIPS Act subsidies.

The US government is helping Samsung run its last remaining US memory maker out of business. Sounds like the exact opposite of what the CHIPS Act was supposed to do.

Even though Samsung is a friendly and the fabs are being built in Texas, it would still be nice to have a US domiciled memory maker left. Certainly the same goes for Samsung’s foundry business and Intel. Subsidizing Samsung when Intel is in a world of pain and resorting to accounting tricks to shore up its balance sheet is not a great idea.

A long downturn could get even longer and deeper

We have been talking about an unusually deep and long downturn and we have been criticized for that view. We are now in the typical rosy analyst view where “the recovery is coming in 6 months”. We have heard this before only to have the can kicked down the road again by another 6 months. The view of a H2 recovery seems widely held because of this fallacy.

There is no firm evidence that supports a H2 recovery other than hope and a prayer. Samsung’s capex behavior reinforces the view of a longer and deeper downturn unless we see them slow down. A longer, deeper downturn, long enough to mortally wound competitors may be what Samsung really wants.

Yangtze memory in China is a survivor and beneficiary

China has taken the memory market by storm and already garnered significant share. One thing that is an absolute certainty is that the Chinese government will anything and everything to insure their success and growth. China would very easily subsidize Yangtze no matter how long and deep the downturn in memory thus insuring its survival. The government has Yangtze’s back.

This suggests that Samsung is doing Yangtze a favor by going after the competition as Yangtze will also be able to take share when the dust clears.

Its not just Micron but a threat to Toshiba

With Toshiba looking to be sold off and broken up, their appetite for capex in the face of a weak industry is also near zero. Even though they have cash where Micron doesn’t they are in a similar leaky boat along with Micron. Japan has long been a strong supplier of memory but could potentially lose another player here.

The stocks

This is obviously pretty bad for Micron. It is an existential threat. At the very least its very damaging and severely crimps their plans and future. We already knew that Micron cuts its capex to the bone so its not much of a further loss to equipment makers.

It could be a positive for Lam if Samsung is serious about continuing to spend on capex (unless this turns out to be a big bluff) as Samsung is their biggest customer. It doesn’t help Toshiba’s valuation nor Hynix and others. Irrational behavior in a closely balanced commodity market is always bad to all involved.

We would hope that someone in the US government has the sense to pick up the phone and call Samsung about their clearly predatory behavior against the US chip industry. We saw that Korea was noticeably absent from the triumvirate of the US, Japan and Netherlands against China even though Korea does make semiconductor equipment and is supposedly a partner with the US.

Maybe Korea/Samsung wants it both ways……..

About Semiconductor Advisors LLC

Semiconductor Advisors is an RIA (a Registered Investment Advisor),
specializing in technology companies with particular emphasis on semiconductor and semiconductor equipment companies. We have been covering the space longer and been involved with more transactions than any other financial professional in the space. We provide research, consulting and advisory services on strategic and financial matters to both industry participants as well as investors. We offer expert, intelligent, balanced research and advice. Our opinions are very direct and honest and offer an unbiased view as compared to other sources.

Also Read:

Samsung Ugly as Expected Profits off 69% Winning a Game of CAPEX Chicken

Samsung Versus TSMC Update 2022

A Memorable Samsung Event

Posted on

Trends and Challenges in Quantum Computing

Trends and Challenges in Quantum Computing
by Ahmed Banafa on 02-02-2023 at 10:00 am
Categories: General

Trends and Challenges in Quantum Computing 1

Quantum Computing is the area of study focused on developing computer technology based on the principles of quantum theory. Tens of billions of public and private capitals are being invested in Quantum technologies. Countries across the world have realized that quantum technologies can be a major disruptor of existing businesses [1].

A Comparison of Classical and Quantum Computing

Classical computing relies, at its ultimate level, on principles expressed by Boolean algebra. Data must be processed in an exclusive binary state at any point in time or what we call bits. While the time that each transistor or capacitor need be either in 0 or 1 before switching states is now measurable in billionths of a second, there is still a limit as to how quickly these devices can be made to switch state.

 As we progress to smaller and faster circuits, we begin to reach the physical limits of materials and the threshold for classical laws of physics to apply. Beyond this, the quantum world takes over, in a quantum computer, a number of elemental particles such as electrons or photons can be used with either their charge or polarization acting as a representation of 0 and/or 1. Each of these particles is known as a quantum bit, or qubit, the nature and behavior of these particles form the basis of quantum computing [2]. Classic computers use transistors as the physical building blocks of logic, while quantum computers may use trapped ions, superconducting loops, quantum dots or vacancies in a diamond [1].

Challenges in Quantum Computing

  • Building scalable and stable quantum hardware: One of the main challenges in quantum computing is building a device that can handle a large number of qubits while maintaining stability and coherence.
  • Dealing with noise and errors in quantum systems: Quantum systems are highly sensitive to noise and errors, which can disrupt computation and lead to inaccurate results.
  • Developing efficient algorithms for quantum computation: As the capabilities of quantum computers are expanding, so is the need for new algorithms that can take advantage of the unique properties of quantum systems.
  • Implementing error correction and error mitigation methods: Error correction and error mitigation are crucial for building a useful quantum computer, but the methods used to accomplish this are still in the early stages of development.
  • Designing and implementing quantum communication and networking: Quantum communication and networking technologies, such as quantum key distribution and quantum teleportation, are still in the early stages of development, and there are many challenges to be overcome before they can be implemented on a large scale.
  • Addressing the lack of skilled professionals: The field of quantum computing is relatively new and there is a shortage of professionals with the necessary skills and knowledge to work with quantum devices and software.
  • Addressing the lack of integration of quantum technology with classical technology: It is still a challenge to seamlessly integrate quantum technology with existing classical technology, making it difficult to use quantum computing for practical applications.
  • Developing robust software and programming languages for quantum computing: There are currently limited software and programming languages that can be used for quantum computing, and these are still in the early stages of development.
  • Addressing the lack of standardization: There is currently a lack of standardization in the field of quantum computing, which makes it difficult to compare different devices and technologies.
  • Addressing the cost-effectiveness of quantum computing: Building and operating a quantum computer is still very expensive, and this is a major barrier to the widespread adoption of quantum computing [3].

Trends in Quantum Computing

·      Increasing qubit count and coherence times in quantum devices: The number of qubits (quantum bits) in a quantum computer is an important metric of its power. As the number of qubits increases, so does the computational power of the device. Coherence times refer to how long qubits can maintain their quantum state before decohering, and longer coherence times enable more complex computations.

·      Development of new quantum algorithms and optimization techniques: As the capabilities of quantum computers are expanding, so is the development of new algorithms and techniques to take advantage of the unique properties of quantum computing. These include quantum machine learning, quantum error correction, and quantum optimization algorithms.

·      Emergence of quantum-inspired classical algorithms and hardware: Researchers are studying the properties of quantum systems to develop new classical algorithms and hardware that mimic some of the advantages of quantum computing.

·      Growing interest and investment in quantum computing from industry and government: As the potential applications of quantum computing become more apparent, there is growing interest and investment in the field from both industry and government.

·      Increased collaboration and sharing of resources among quantum research institutions and companies: As quantum computing becomes more important, there is an increasing amount of collaboration and sharing of resources among quantum research institutions and companies.

·      The use of quantum machine learning and quantum artificial intelligence: Researchers are exploring the use of quantum computing to develop new machine learning and artificial intelligence algorithms that can take advantage of the unique properties of quantum systems.

·      Rising of Quantum Cloud Services: With the increasing qubit count and coherence times, many companies are now offering quantum cloud services to user, which allows them to access the power of quantum computing without the need of building their own quantum computer.

·      Advancement in Quantum Error Correction: To make a quantum computer practically useful, it is necessary to have quantum error correction techniques to minimize the errors that occur during computation. Many new techniques are being developed to achieve this goal.

The Future?

In the near future, it is likely that quantum computing will continue to be developed for specific applications such as optimization, machine learning and cryptography. Researchers are also working on developing more stable and reliable qubits, which are the building blocks of quantum computers. As the technology matures and becomes more accessible, it is expected to be increasingly used in industries such as finance and healthcare, where it can be used to analyze large amounts of data and make more accurate predictions.

In the long term, #quantumcomputing has the potential to revolutionize many industries and change the way we live and work. However, it is still a relatively new technology, and much research and development is needed before it can be fully realized [3].

 Ahmed Banafa, Author the Books:

Secure and Smart Internet of Things (IoT) Using Blockchain and AI

Blockchain Technology and Applications

Quantum Computing

 References

 1. https://www.linkedin.com/pulse/quantum-technology-ecosystem-explained-steve-blank/?

2. https://www.bbvaopenmind.com/en/technology/digital-world/quantum-computing-and-ai/

3. #chatgpt

Also Read:

10 Impactful Technologies in 2023 and Beyond

9 Trends of IoT in 2023

9 Trends Will Dominate Blockchain Technology In 2023

Posted on

Careful Who You Work for

Careful Who You Work for
by Roger C. Lanctot on 02-02-2023 at 6:00 am
Categories: General
4 Comments

Careful Who You Work for

When one is looking for a job and that hunt extends from weeks into months or even years one is inclined to default to an any-port-in-a-storm mindset. Some recent experiences suggest to me that that mentality may need a reevaluation.

I was surprised to learn recently, from conversations with industry acquaintances, that one’s future employment prospects can be colored unpredictably by one’s previous employment – or let’s say one’s previous employer. One acquaintance found that an association with two previous employers – tenures that had been marked by professional success and measurably positive outcomes – had marked this person as unemployable.

The description this person gave me was that employment by one particular company at a senior level had placed this person on a blacklist within a particular industry echelon. A headhunter let this executive know that doors were closed to potential positions merely as a result of having worked for a particular company.

The company in question had engaged in strategies that had led to immense financial losses to investors and created the appearance of fraud. The executive in question, my acquaintance, had nothing to do with strategic or financial decisions at the company, but it didn’t appear to matter. Just having worked for the company at a senior level during the period in question was disqualifying for future employers.

This executive went on to work for a much much larger public company in the IT industry leading a team of dozens of executives in launching a hugely successful business-to-business marketing campaign. Following this campaign, due to unrelated strategic decisions at the company, this executive’s department was massively downsized and the executive was let go.

This experience, too, proved a negative to potential future employers. In this case, it was the renowned toxic culture of the company – a major Fortune 500 IT firm – that tainted this executive’s reputation. It was as if to say that simply having worked at this company – famous for its attention-getting CEO – this executive was now infected and unhire-able.

I am happy to say that this highly talented individual has not been held down by these reputational impediments and has found a new home for their particular set of skills.

Another acquaintance of mine, who I originally met about three years before at CES 2020, recently found a new home and I reconnected. In this case, when I met this executive they were working for a company which had a horrible industry reputation – largely related to the behavior of the company’s CEO, who was verbally abusive to colleagues and customers.

When I first met this executive I was immediately sympathetic to their plight, knowing the company’s and the CEO’s reputation, which were likely unknown to this executive at this early stage of their employment. Having escaped this company and now working elsewhere, the executive had a quite different experience from that of the previously-described executive.

Having left their previously toxic work environment this executive discovered widespread sympathy from the new employer and elsewhere in the industry. Future employers were aware of the dysfunction at the previous employer and were more than happy to rescue a talented individual to join their team.

The bottom line is that most industries are not in fact Industries – with a capital “I.” Most industries are neighborhoods. Everybody knows everybody else. There are few secrets.

Industry colleagues tend to share information as employees migrate from company to company and customers, too, share their impressions of how their suppliers interact. Reputations are formed organically and working for a company can be used against you or can work in your favor and can influence one’s decision to apply for or accept an offer from said company.

It’s often difficult to see this reputational background radiation. It can be hard to understand how your organization or any organization is perceived. But these two experiences suggest that internal corporate culture has external consequences and relevance.

Who you work for matters. I am currently reading Emmis Communications CEO Jeff Smulyan’s “Never Ride a Rollercoaster Backwards” in which Smulyan talks about how Emmis’ reputation for being a great place to work contributed to the company’s ability to hire (and sometimes steal) great talent and may have even made acquisitions less expensive, though even Smulyan expresses skepticism on this point.

It is not always possible to choose who we work for. But my recent experiences suggest that it matters a lot. With massive layoffs spreading across the technology industry, plenty of folks will be pondering their next steps. As the weeks and months slide by that any-port-in-a-storm mindset may kick in, but remember that it does matter who you work for and how your organization treats its employees and customers.

P.S.

For the record, I work for a great organization. No complaints. How about you?

Also Read:

10 Impactful Technologies in 2023 and Beyond

Effective Writing and ChatGPT. The SEMI Test

All-In-One Edge Surveillance Gains Traction

Posted on

U.S., Japan & Dutch versus China Chips & Memory looks to be in a long downturn

U.S., Japan & Dutch versus China Chips & Memory looks to be in a long downturn
by Robert Maire on 02-01-2023 at 2:00 pm
Categories: China, Lithography
2 Comments

US Japan China

-US, Japan & Dutch agree to embargo some China chip equip
-Goes beyond just leading edge & will increase negative impact
-China might catch up in decades or invade Taiwan tomorrow
-Why the memory downturn could be longer than expected

Ganging up on China

It appears that the US has put together a coalition of the US, Japan and the Netherlands all of which will agree to stop selling certain semiconductor equipment to China.

This unified front against China is an obvious slap in the face but most importantly is likely a very effective way to shut China out of advanced semiconductor manufacturing.

Those three countries taken together make the vast majority of semiconductor equipment and more critically an even higher percentage of the leading edge equipment.

China would be unable to make even the most rudimentary semiconductors if it couldn’t buy any equipment from all three. Chinese semiconductor equipment makers are still in early stages and fundamentally rely on copying other manufacturers basic designs with little home grown R&D.

It will take decades to copy US, Japanese & Dutch tools

While China may be able to physically copy some dep and etch tools, it does not have the very deep and complex supply chain to source the amazingly complex lenses made by Zeiss or Nikon. Nor does China have the millions of lines of code in a KLA tool for defect analysis.

Copying will be much more difficult than the blatant rip off of US military plane designs as semiconductors and the tools that make them are way more complex.

Also missing is the decades of human capital and infrastructure such as there is in Silicon Valley where the expertise varies from the artisan welders of stainless steel piping to the decades of experience with plasma process.
EUV has been over 35 years in the making having started in Japan and the US then moving to the Netherlands.

No matter how much money is thrown at the technology issues, it will take a very, very long time. As the saying “nine women can’t make a baby in one month” goes (pardon the analogy) so goes semiconductor technology advancement.

By the time China is able to copy existing technology, the rest of the world will be decades further along. This is not to suggest they can never catch up, but likely not in most of our lifetimes.

Beyond restricting EUV

It appears from news reports that restrictions are now even broader than what was talked about in October in the US with 193 “immersion” litho systems mentioned. Restricting 193 immersion would push the Chinese back even further to a point where they couldn’t reasonably do multiple patterning or quadruple patterning or other tricks to try to get EUV like dimensions even at ridiculously low yields. It would push back to 28NM type technology.

Even more impact than the October embargo

If ASML and Nikon are not allowed to sell immersion scanners then it would make sense that KLA would be prohibited from selling a matching generation of reticle and wafer inspection tools and not just EUV capable tools. This could suggest that Metrology sales from the likes of KLA & AMAT etc will be further restricted in China.

TEL will likely not be able to sell EUV track tools or even immersion track tools. No dry resist for Lam nor high aspect ratio etch tools.

ASMI would likely not be able to sell ALD tools….the list goes on and on about much deeper impact if we go back to immersion technology.

It may be that from a political perspective going back to embargoing immersion is likely not only more punitive and effective but also more evenly shares the economic pain of those doing the embargoing by not just restricting the most advanced scanners.

We have yet to see the details, but the few points of information point to a deeper embargo.

A very serious escalation with no response (so far)

We are surprised about the seriousness and level of effort the current administration has put in versus prior efforts to contain China through tax policy. Forming a coalition is a significant escalation of tensions and effectiveness.

We are also surprised that China has so far not responded to the October embargo by cutting off rare earth elements or pharmaceuticals or some other critical export.

All we can imagine is that it just makes Taiwan that much more attractive to China….

Taiwan the “hollow” prize

While China may have dreams about taking over Taiwan and along with it the semiconductor industry, the real reality is that TSMCs fabs would quickly become unusable without support from equipment makers and would cease to function in a relatively short time as we saw when Jin Hua was abandoned overnight.

But it would be a really neat way of depriving the rest of the world the semiconductors they need. Perhaps with the thought “that if I can’t have them you won’t have them either”.

Don’t be surprised if China puts one very small missile into each fab in Taiwan thereby taking them all off line.

Memory – Deeper and longer downturn than expected

Also in the news media (Wall Street Journal) is the realization that the memory downturn is going to be longer and deeper than previously thought…..DUH!.

As we have pointed out numerous times, capacity keeps increasing through technology shrinks even without significant capital investment. Memory companies may slow the purchase of new equipment or new fabs but they will keep up R&D to get to more layers of NAND or the next generation of DRAM which gets the industry more bits without more (significant) bucks.

Technology marches on even in a down turn.

Although its clear that Micron and even Samsung cutting back on production there is still a lot of excess capacity, and getting worse, and pricing is not recovering and buyers likely know that.

The profitability of Samsung and Micron is already suffering and will get worse.
This all suggests a longer, deeper memory downturn than many people were expecting.

This means that capital spending by memory makers will be very significantly delayed and new fab construction will be even further delayed. We would guess that projects that Samsung had outside of Korea, especially those in China will be delayed or canceled.

Micron will without doubt push back its new Boise fab and New York even further behind that. It may be that most of the bit growth needed in slow times can be handled with existing fabs with tweaks in technology rather than new incremental capacity…at least for the next few years.

The stocks

The escalation of the embargo with China is negative for every equipment company as it may increase the amount of equipment covered under the ban.

The coalition is positive in that US companies such as AMAT and LRCX don’t have to worry about TEL or ASMI or other Japanese or Dutch companies eating their lunch in China.

The escalation is bad in that it begs a retaliation from China which will likely not be good for those involved.

As we have said many times, the equipment industry in the long run is a zero sum game. Especially for ASML, as equipment not sold to China will be sold elsewhere as someone, somewhere will make the chips if there is demand for them (even though right now demand is down….)

Overall this just potentially adds to the woes the equipment industry already has, the triple whammy of China, weak economy and horrible memory. There is not likely a good resolution to this all as we very, very highly doubt that the administration will loosen the sanctions as it has shown that it is so far unwilling to unwind sanctions in other situations. This means that chip equipment sales to China might not ever recover and most likely could worsen.

It will take time for others to displace China’s huge spending spree, but we could see India, Vietnam, Singapore and of course the re-shoring to the US and Europe to start to make up for a loss of China. Those investors hoping for a quick snap back in the chip industry may be disappointed.

We would try to minimize China exposure in our Chip portfolio, in both directions, either as a supplier or customer. We would be aware of those who could be in the way of a retaliatory strike by China such as those dependent upon rare earth elements.

About Semiconductor Advisors LLC
Semiconductor Advisors is an RIA (a Registered Investment Advisor),
specializing in technology companies with particular emphasis on semiconductor and semiconductor equipment companies. We have been covering the space longer and been involved with more transactions than any other financial professional in the space. We provide research, consulting and advisory services on strategic and financial matters to both industry participants as well as investors. We offer expert, intelligent, balanced research and advice. Our opinions are very direct and honest and offer an unbiased view as compared to other sources.

Also Read:

Lam chops guidance, outlook, headcount- an ugly, long downturn- memory plunges

ASML – Powering through weakness – Almost untouchable – Lead times exceed downturn

Where there’s Smoke there’s Fire: UCTT ICHR LRCX AMAT KLAC Memory
‌

Posted on

Achieving Faster Design Verification Closure

Achieving Faster Design Verification Closure
by Daniel Payne on 02-01-2023 at 10:00 am
Categories: EDA, Siemens EDA

Questa Verification IQ min

On big chip design projects the logic verification effort can be larger than the design effort, taking up to 70% of the project time based on data from the 2022 Wilson Research Group findings. Sadly, the first silicon success rate has gone downwards from 31 percent to just 24 percent in the past 8 years, causing another spin to correct the flaws, costing companies lost time to market and certainly hurting their revenue plans. Better verification would certainly improve first silicon success, but that is easier said than done.

Some other sobering numbers from the Wilson Research Group study:

  • ASIC – 24% first time success, 36% finish on time
  • FPGA  – 16% achieve zero bug escapes, 30% finish on time

Design verification has many difficult chores: debugging, creating tests then running engines, testbench development and test planning. Ideally your team wants to minimize turn-around times, reach verification closure with the fewest people and compute resources, meet safety compliance, and know when the design quality is high enough to stop verifying, while meeting the project schedule.

I recently got an update from design verification expert Darron May at Siemens EDA to hear about something just announced, called Questa Verification IQ. Their approach is all about data-driven verification formed around using traceability, collaboration and analytics powered by AI/ML. Traditional analytics provided limited productivity and insight into just describing and diagnosing logic behavior, while big data-driven analytics using AI/ML offer predictive and prescriptive actions for verification. Software and hardware teams are becoming more productive by collaborating through the use of CI (Continuous Integration), Agile methods, ALM (Application Lifecycle Management), cloud-based design, and applying AI/ML techniques. Safety critical industries have a need for traceability between requirements, implementation and verification, as defined in industry standards like ISO 26262 and DO-254.

Here’s the big picture of how Quest Verification IQ connects together all of the data from various verification engines into a data-driven flow, along with an ALM tool.

Questa Verification IQ

The coverage data is gathered from logic simulation (Questa), Emulation and Prototyping (Veloce), AMS (Symphony), Formal (OneSpin), Static and FuSa. The ML feature analyzes all of this data in order to predict patterns and reveal any holes, point out root causes, then prescribe action to improve coverage. The ALM shown is Polarion from Siemens, although you could use another ALM, just like you can use your favorite verification engines.

Questa Verification IQ is a browser-based framework that includes a process guide so that you can build a safety critical flow using lifecycle management to plan and track all requirements. The regression navigator enables your team to create and execute tests, monitor the results, and have a complete verification history. With the coverage analyzer you know how complete your coverage is for code, functional blocks and test plans. Finally, the data analytics presented provide you with a metric platform, using project dashboards and providing cross analytics.

The web-based framework scales for any size of electronics project, and you won’t have to install any software or be concerned about keeping your OS updated. It also supports public, private or hybrid cloud setups. With AI/ML being applied the verification closure process is sped up, while debug effort quickens as root cause analysis helps pinpoint where to improve.

I asked Darron May a few clarifying questions.

Q: Can I mix and match Questa Verification IQ with any EDA vendor tool and ALM?

A: Questa Verification IQ supports ALM tools and engines via a standards based approach. It interfaces with ALM tools using Open Services for Lifecycle Collaboration (OSLC) so any tool supporting the standard like Doors next or Siemens Polarion and Teamcenter can be used. Any engine can be launched by Questa Verification IQ and again we have support for coverage via the  Unified Coverage Interoperability Standard (UCIS).

Q: How does this approach compare to Synopsys DesignDash?

A: Synopsys DesignDash is focused on ML for design data whereas Questa Verification IQ is focused on data driven verification using analytics, including ML, to accelerate verification closure, reduce turn-around times and provide maximum process efficiency. Questa Verification IQ provides applications needed for team-based collaborative verification management in a browser-based framework with centralized access to data.

Q: How does this approach compare to Cadence Verisium?

A: Cadence Verisium focuses only on ML assisted Verification. In comparison Siemens Questa Verification IQ provides complete data driven verification solution powered by Analytics, Collaboration and Traceability. Verification Management is provided in a browser-based tool with applications built around Collaboration. Coverage Analyzer brings the industry’s first collaborative coverage closure tool using analytical navigation assisted by ML. Question Verification IQ interfaces with Siemens Polarion using OSLC and provides a tight digital thread traceability with Application Lifecycle Management with no UI context change, bringing the power of ALM to hardware verification.

Summary

I’m always impressed with new EDA tools that make a complex task easier by working smarter, not requiring engineers to put in more hours of manual effort. With early endorsements of Questa Verification IQ from familiar companies like Arm and Nordic Semiconductor, it looks like Siemens EDA has added something compelling for verification teams to consider looking at.

Related Blogs

Posted on

Multiple Monopole Exposures: The Correct Way to Tame Aberrations in EUV Lithography?

Multiple Monopole Exposures: The Correct Way to Tame Aberrations in EUV Lithography?
by Fred Chen on 02-01-2023 at 6:00 am
Categories: Lithography

Multiple Monopole Exposures 1

For a leading-edge lithography technology, EUV (extreme ultraviolet) lithography is still plagued by some fundamental issues. While stochastically occurring defects probably have been the most often discussed, other issues, such as image shifts and fading [1-5], are an intrinsic part of using reflective EUV optics. However, as long as these non-stochastic issues can be systematically modeled, effectively as aberrations, corrective approaches may be applied.

Image shifts are an unavoidable part of EUV lithography for a variety of reasons, including feature position on mask and mask position [6]. However, at any given position of and on the mask, image shifts occur because the image is actually composed of sub-images from smaller and larger angles of reflection from the EUV mask. The larger angles are generally smaller amplitude and shift one way with defocus, while the smaller angles are generally larger amplitude and shift the opposite direction with defocus. The combined effect is to have a small net shift with defocus (Figure 1). If the amplitudes for the smaller and larger angles were the same, there would be no shift [3].

Figure 1. A net image shift results from different amplitude waves moving in opposite directions due to defocus.

The measured shifts and the best focus position are both nontrivial functions of both the illumination angle and the pitch [1]. From Figure 2, based on these measurements on a 0.33 NA system, we can also pick out illuminations which are best suited for particular pitches.

Figure 2. 0.8/0.5 dipole is suited for 32 nm horizontal line pitch, while 0.7/0.4 dipole is more suited for 37.3 nm.

For example, the 32 nm horizontal line pitch is best matched with the 0.8/0.5 dipole shape (45 deg span, 0.5 inner sigma, 0.8 outer sigma). On the other hand, the 0.7/0.4 dipole shape seems best matched with around 37 nm horizontal line pitch, or closer to 37.3 nm. So, ideally, a pattern containing these two pitches should be printed in two parts, one with 0.8/0.5 illumination for the part containing 32 nm pitch, and one with 0.7/0.4 illumination for the part containing 37.3 nm pitch. This would solve both the best focus difference and defocus image shift issues for these two pitches.

However, one other shift-related issue remains. The image position itself at best focus is different for different pitches. This can fortunately be corrected in a straightforward manner by the method suggested in Ref. 4. The shift can be directly compensated as different exposure positions. Moreover, the fading can be further eliminated by splitting the dipole illumination up as two exposures, one for each monopole [4]. This allows the perfect overlap of the images from each of the two poles (Figure 3). This would mean a total of four exposures for the 32 nm and 37.3 nm pitches. In addition, overlay needs to be tight for the shifts to be cancelled (<1nm). The dose would be reduced to 1/4 of the original dose for each exposure. However, the throughput may still suffer from the lower pupil fill (<20%) of the monopole. One alleviating possibility is to expand the monopole width to increase pupil fill, at least for some of the pitches being targeted.

Figure 3. Compensating exposure positions for each monopole exposure can lead to a zero dipole image shift.

This multiple exposure approach can be generalized to two-dimensional patterns, covering more pitches. In combination with mask position and mask position-dependent adjustments, it is the only true rigorous way to fully correct the image shift aberrations in EUV lithography.

References

[1] F. Wittebrood et al., ““Experimental verification of phase induced mask 3D effects in EUV imaging,” 2015 International Symposium of EUVL – Maastricht.

[2] T. Brunner et al., “EUV dark field lithography: extreme resolution by blocking 0th order,” Proc. SPIE 11609, 1160906 (2021).

[3] F. Chen, “Defocus Induced Image Shift in EUV Lithography,” https://www.youtube.com/watch?v=OXJwxQK4S8o

[4] J-H. Franke, T. A. Brunner, E. Hendrickx, “Dual monopole exposure strategy to improve extreme ultraviolet imaging,” J. Micro/Nanopattern. Mater. Metrol. 21, 030501 (2022).

[5] J-H. Franke et al., “Improving exposure latitudes and aligning best focus through pitch by curing M3D phase effects with controlled aberrations,” Proc. SPIE 11147, 111470E (2019).

[6] F. Chen, “Pattern Shifts in EUV Lithography,” https://www.youtube.com/watch?v=udF9Dw71Krk

This article first appeared in LinkedIn Pulse: Multiple Monopole Exposures: The Correct Way to Tame Aberrations in EUV Lithography?

Also Read:

ASML – Powering through weakness – Almost untouchable – Lead times exceed downturn

Application-Specific Lithography: Sub-0.0013 um2 DRAM Storage Node Patterning

Secondary Electron Blur Randomness as the Origin of EUV Stochastic Defects