Tag: thermal

Webinar: Accelerate Thermal and Flow Optimization with Ansys optiSLang and Thermal Desktop

Webinar: Accelerate Thermal and Flow Optimization with Ansys optiSLang and Thermal Desktop
by Admin on 10-22-2025 at 3:55 am

Join our webinar to learn how Ansys optiSLang and Thermal Desktop tackle thermal and fluid challenges, optimize design, and enhance product performance with a vapor chamber use case.

Date & Time:

November 5, 2025

11AM EDT

Venue:

Virtual

Overview

In this webinar, discover how Ansys optiSLang and Ansys Thermal Desktop empower

… Read More
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Altair SimLab: Tackling 3D IC Multiphysics Challenges for Scalable ECAD Modeling

Altair SimLab: Tackling 3D IC Multiphysics Challenges for Scalable ECAD Modeling
by Kalar Rajendiran on 07-10-2025 at 10:00 am
Categories: 3D IC, Altair, Chiplet, EDA

What is SimLab

The semiconductor industry is rapidly moving beyond traditional 2D packaging, embracing technologies such as 3D integrated circuits (3D ICs) and 2.5D advanced packaging. These approaches combine heterogeneous chiplets, silicon interposers, and complex multi-layer routing to achieve higher performance and integration.… Read More

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Five Key Workflows For 3D IC Packaging Success

Five Key Workflows For 3D IC Packaging Success
by Kalar Rajendiran on 08-31-2022 at 6:00 am
Categories: Chiplet, EDA, Siemens EDA

3D IC design workflows

An earlier blog started with the topic of delivering 3D IC innovations faster. The blog covered the following foundational enablers for successful heterogeneous 3D IC implementation.

  • System Co-Optimization (STCO) approach
  • Transition from design-based to systems-based optimization
  • Expanding the supply chain and tool
… Read More
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Accuracy of In-Chip Monitoring for Thermal Guard-banding

Accuracy of In-Chip Monitoring for Thermal Guard-banding
by Daniel Payne on 01-28-2019 at 12:00 pm
Categories: Automotive, IoT, Mobile, Moortec
2 Comments

I remember working at Intel and viewing my first SPICE netlist for a DRAM chip, because there was this temperature statement with a number after it, so being a new college graduate I asked lots of questions, like, “What is that temperature value?”

My co-worker answered, “Oh, that’s the estimated junction… Read More

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Coupled Electro-thermal Analysis Essential for PowerMOS Design

Coupled Electro-thermal Analysis Essential for PowerMOS Design
by Tom Simon on 11-08-2018 at 12:00 pm
Categories: EDA, Magwel

Power device designers know that when they see a deceptively simple pair of PowerMOS device symbols in the output stage of a power converter circuit schematic, they are actually looking at a massively complex network of silicon and metal interconnect. The corresponding physical devices can have a total device W on the order of … Read More

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Webinar: Thermal and Reliability for ADAS and Autonomy

Webinar: Thermal and Reliability for ADAS and Autonomy
by Bernard Murphy on 05-15-2018 at 7:00 am
Categories: Ansys, Inc., Automotive, EDA, Events

OK, so maybe the picture here is a little over the top, but thermal and reliability considerations in automotive in general and in ADAS and autonomy in particular, are no joke. Overheating, thermal-induced EM and warping at the board-level, in the package or interposers, are concerns in any environment but especially when you’re… Read More

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Webinar: Multiphysics Reliability Signoff for Next-Generation Automotive Electronics Systems

Webinar: Multiphysics Reliability Signoff for Next-Generation Automotive Electronics Systems
by Bernard Murphy on 02-08-2018 at 7:00 am
Categories: Ansys, Inc., Automotive, EDA, Foundries, TSMC

In case you missed the TSMC event, ANSYS and TSMC are going to reprise a very important topic – signing-off reliability for ADAS and semi-autonomous /autonomous systems. This topic hasn’t had a lot of media attention amid the glamor and glitz of what might be possible in driverless cars. But it now seems like the cold light of real … Read More

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Reliability Signoff for FinFET Designs

Reliability Signoff for FinFET Designs
by Bernard Murphy on 10-17-2017 at 7:00 am
Categories: Ansys, Inc., Automotive, EDA, TSMC

Ansys recently hosted a webinar on reliability signoff for FinFET-based designs, spanning thermal, EM, ESD, EMC and aging effects. I doubt you’re going to easily find a more comprehensive coverage of reliability impact and analysis solutions. If you care about reliability in FinFET designs, you might want to check out this webinar.… Read More

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Webinar: Signoff for Thermal, Reliability and More in Advanced FinFET designs

Webinar: Signoff for Thermal, Reliability and More in Advanced FinFET designs
by Bernard Murphy on 09-17-2017 at 7:00 am
Categories: Ansys, Inc., Automotive, EDA, FinFET, Mobile

In automotive applications, advanced FinFET processes are great for high levels of integration and low power. But they also present some new challenges in reliability signoff. Ansys will be hosting a webinar to highlight the challenges faced by engineers trying to ensure thermal, electromigration (EM) and electrostatic discharge… Read More

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Simulating ADAS

Simulating ADAS
by Bernard Murphy on 05-04-2017 at 7:00 am
Categories: Ansys, Inc., Automotive, EDA, IoT

Simulation is a broad technique spanning certainly digital logic and circuit simulation but also methods beyond these which are particularly relevant to ADAS design. In fact, much of the design of full ADAS systems begins and ends with these types of modeling. This is in part due to the need fully validate integrity and reliability… Read More