Succeeding with 56G SerDes, HBM2, 2.5D and FinFET

Succeeding with 56G SerDes, HBM2, 2.5D and FinFET
by Daniel Nenni on 03-17-2017 at 4:00 pm

eSilicon presented their advanced ASIC design capabilities at a seminar last Wednesday evening. This event was closed to the press, bloggers and analysts, but I managed to get some details from a friend who attended. The event title was: “Advanced ASICs for the Cloud-Computing Era: Succeeding with 56G SerDes, HBM2, 2.5D and FinFETRead More


SPIE 2017: EUV Readiness for High Volume Manufacturing

SPIE 2017: EUV Readiness for High Volume Manufacturing
by Scotten Jones on 03-03-2017 at 12:00 pm

The SPIE Advanced Lithography Conference is the world’s leading conference addressing photolithography. This year on the opening day of the conference, Samsung and Intel presented papers summarizing the readiness of EUV for high volume manufacturing (HVM). In this article, I will begin by summarizing the EUV plans … Read More


EUV is NOT Ready for 7nm!

EUV is NOT Ready for 7nm!
by Daniel Nenni on 02-27-2017 at 8:00 am

The annual SPIE Advanced Lithography Conference kicked off last night with vendor sponsored networking events and such. SPIE is the international society for optics and photonics but this year SPIE Advanced Lithography is all about the highly anticipated EUV technology. Scotten Jones and I are at SPIE so expect more detailedRead More


Scott Jones ISS Talk – Moore’s Law Lives!

Scott Jones ISS Talk – Moore’s Law Lives!
by Scotten Jones on 02-07-2017 at 12:00 pm

I was invited to give a talk at this year’s ISS conference, the talk seemed to be very well received and I was asked to blog about it for SemiWiki. Parts of the talk will be familiar to SemiWiki readers from some of my previous blogs but I also went into more detail around some scaling challenges. The following is a summary of what… Read More


The 2017 Leading Edge Semiconductor Landscape

The 2017 Leading Edge Semiconductor Landscape
by Scotten Jones on 12-27-2016 at 6:00 pm

In early September of 2016 I published an article “The 2016 Leading Edge Semiconductor Landscape” that proved to be very popular with many views, comments and reposting’s. Since I wrote that article a lot of new data has become available enabling some projections to be replaced by actual values and new analysis… Read More


IEDM 2016 – Marie Semeria LETI Interview

IEDM 2016 – Marie Semeria LETI Interview
by Scotten Jones on 12-21-2016 at 7:00 am

Marie Semeria is the CEO of Leti, one of the world’s premier research organization for semiconductor technology and the key development center for FDSOI. I first interviewed Marie at SEMICON West and at IEDM I had a chance to sit down with her and get an update on Leti’s efforts over the last several months.

My interview… Read More


Final SemiWiki Book Signing at REUSE 2016!

Final SemiWiki Book Signing at REUSE 2016!
by Daniel Nenni on 11-08-2016 at 4:00 pm

It has been a hectic year for the semiconductor industry so now is a good time to reflect on how we got to where we are today in hopes of better understanding where we are going tomorrow.

Given the importance of semiconductor IP (the $32B ARM acquisition by SoftBank for example) I would strongly suggest attending the REUSE 2016 event… Read More


What’s the Intel Capex Outlook?

What’s the Intel Capex Outlook?
by Robert Maire on 10-23-2016 at 7:00 am

Intel has terrific QTR & slightly light guide Intel is recovering & transforming at the same time. Whats the Capex outlook? Impact on ASML KLAC LRCX?

Intel reported revenues of $15.78B and earnings of $0.80 for the quarter beating expectations and previous upward guidance. CCG (PCs) were up 21% Q/Q and 5% Y/Y. Data center… Read More


Soitec – Enabling the FDSOI Revolution

Soitec – Enabling the FDSOI Revolution
by Scotten Jones on 10-18-2016 at 12:00 pm

Recently I published two blogs on Fully Depleted Silicon On Insulator (FDSOI) and the potential the technology shows for a variety of low power and wireless applications. In order to produce FDSOI devices, the device layer has to be thin enough to ensure the device is fully depleted and ideally the buried oxide has to be thin enough… Read More