Moving to Deeply Scaled Nodes for Power? There is a Better Way

Moving to Deeply Scaled Nodes for Power? There is a Better Way
by Mike Gianfagna on 08-24-2020 at 10:00 am

AGGIOS Definition

Did you know you can save 30% to 60% power without spending a fortune on a process migration? There is a better way than moving to deeply scaled nodes for power. Read on…

Have you heard of AGGIOS? You will. The name stands for AGGregated IO Systems, and a team of ex ARM and Qualcomm engineers are re-inventing power management. I’ll explain… Read More


Is IP SoC 2018 Still Alive? Better than Ever!

Is IP SoC 2018 Still Alive? Better than Ever!
by Eric Esteve on 11-27-2018 at 12:00 pm

The 21[SUP]st[/SUP] IP-SoC Days conference will be held in Grenoble, France, on December 5-6, 2018. IP-SoC is now the unique IP centric conference, with presentations reflecting the complete IP ecosystem: IP suppliers and foundries, external IP or internal reuse managers. Look at the program, you will see the hot topics covered… Read More


The Rebirth of Dolphin Integration!

The Rebirth of Dolphin Integration!
by Eric Esteve on 09-10-2018 at 7:00 am

You may have seen this Press Release (see below) announcing that Dolphin Integration (Dolphin) has been acquired by Soitec (60%) and MBDA (40%) – you can see more information about these two companies at the bottom of this blog. Founded in 1985, Dolphin had some recurrent cash flow issues during the last couple of years, that they… Read More


Design for Power: An Insider View

Design for Power: An Insider View
by Bernard Murphy on 06-28-2018 at 7:00 am

The second keynote at Mentor’s U2U this year was given by Hooman Moshar, VP of Engineering at Broadcom, on the always (these days) important topic of design for power. This is one of my favorite areas. I have, I think, a decent theoretical background in the topic, but I definitely need a periodic refresh on the ground reality from the… Read More


Power Management Beyond the Edge

Power Management Beyond the Edge
by Bernard Murphy on 01-25-2017 at 7:00 am

Power in IoT edge devices gets a lot of press around how to make devices last for years on a single battery charge, significantly through “dark silicon” – turning on only briefly to perform some measurement and shoot off a wireless transmission before turning off again. But we tend to forget that the infrastructure to support… Read More


Customized PMICs with OTP in automotive and IoT

Customized PMICs with OTP in automotive and IoT
by Don Dingee on 08-24-2016 at 4:00 pm

Power. Every device needs it. Managing it properly can make all the difference between a device people enjoy using and one that is more hassle than it is worth. What happens between the battery and the processor is the job of the power management integrated circuit (PMIC).

Why are PMICs gaining so much attention? Increased power … Read More


The Perfect Wearable SoC…?

The Perfect Wearable SoC…?
by Rick Tewell on 08-23-2016 at 12:00 pm

Power is Everything
During Apollo 13 after the oxygen tank in the service module exploded forcing the crew to use the lunar module as a life boat to get back home, John Aaron – an incredibly gifted NASA engineer who was tasked with getting the Apollo 13 crew back home safely – flatly stated “Power is everything…we’veRead More


Sonics opens new strategy for SoC energy processing

Sonics opens new strategy for SoC energy processing
by Don Dingee on 05-09-2016 at 4:00 pm

Back in February when we shared the Sonics philosophy on the ICE-Grain Power Architecture for hardware-based SoC power management, I speculated we’d know more by DAC 2016. Sonics is hitting the road with a new live seminar coming to Silicon Valley this month and Austin during DAC – and the news is big.… Read More


SoC power management a study in transition latency

SoC power management a study in transition latency
by Don Dingee on 02-22-2016 at 4:00 pm

Apple’s recent bout with ‘Batterygate’ highlighted just how important dynamic power management can be. Our last Sonics update looked at using their NoC to manage power islands; this time, we look at their research progress on architectural measures for power management.… Read More


Networking through dark silicon power islands

Networking through dark silicon power islands
by Don Dingee on 12-27-2015 at 7:00 am

For decades, tracing back to the days of Deming, the way to tackle complex engineering problems has been the pareto chart. Charting conditions and their contribution to the problem leads to mitigation priorities.

In the case of SoC power management, the old school pareto chart said the processor core was the biggest power hog and… Read More