This is what happens when you have a CFO acting as a semiconductor CEO, and Robert Holmes is a career CFO with zero semiconductor experience or education. Granted, no way did he write the opening statement, but it was full of jibber jabber anyway. The real disappointing jibber jabber was from our own Murthy Renduchintala on the status… Read More
Tag: moore’s law
ASML most immune to slow down due to lead times Not LRCX
ASML reported EUR2.78B in revenues with EUR2.08B in systems. 58% was for memory. EUV was EUR513M with 5 systems. Importantly orders were for EUR2.20B in systems at 64% memory and 5 EUV tools. This was likely better than expectations given the overall industry weakness. EPS of EUR1.60 was more or less in line with expectations. Guidance… Read More
An update on the Design Productivity Gap
Over a decade ago, a group of semiconductor industry experts published a landmark paper as part of the periodic updates to the International Technology Roadmap for Semiconductors, or ITRS for short (link). The ITRS identified a critical design productivity gap. The circuit capacity afforded by the Moore’s Law pace of technology… Read More
Top 10 Highlights from the Samsung Foundry Forum
Samsung Foundry recently held their annual technology forum in Santa Clara CA. The forum consisted of: presentations on advanced and mainstream process technology roadmaps; the IP readiness for those technology nodes; a review of several unique package offerings; and, an informal panel discussion with IP designers and EDA… Read More
Semiconductor Devices Transforming the World
As we begin another new year we begin another semiconductor conference cycle starting with SEMI ISS on January 15–18 at the Ritz-Carlton in Half Moon Bay California. This conference really sets the tone for the year and gives us a place to start thinking, acting, and reacting. This year it is all about the electronic devices we have… Read More
Tools for Advanced Packaging Design Follow Moore’s Law, Too!
There is an emerging set of advanced packaging technologies that enables unique product designs, with the capability to integrate multiple die, from potentially heterogeneous technologies. These “system-in-package” (SiP) offerings provide architects with the opportunity to optimize product performance, power, cost,… Read More
Intel Manufacturing Day: Nodes must die, but Moore’s Law lives!
Yesterday I attended Intel’s manufacturing day. This was the first manufacturing day Intel has held in three years and according to Intel their most in depth ever.
Nodes must die
I have written several articles comparing process technologies across the leading-edge logic producers – GLOBALFOUNDRIES, Intel, Samsung… Read More
Top 10 Updates from the TSMC Technology Symposium, Part II
An earlier article described some of the technical and business highlights from the recent TSMC Symposium in Santa Clara (link). This article continues that discussion, with the top five updates.… Read More
AMD vs Intel Update!
Is it just me or has AMD just pulled off one of the most amazing semiconductor comebacks of the century? Let’s take a closer look.
Who doesn’t long for the days when Intel and AMD went head to head in the battle for microprocessor supremacy? Back then Intel, was still operating under the Andrew Grove mantra of “Only the Paranoid Survive”… Read More
ISS Gary Patton Keynote: FD-SOI, FinFETS, and Beyond!
Two weeks ago the SEMI ISS Conference was held at Half Moon Bay in California. On the opening day of the conference Gary Patton CTO of GLOBALFOUNDRIES gave the keynote address and I also had the chance to sit down with Gary for an interview the next day.