SPIE Let there be Light! High NA Kickoff! Samsung Slows? “Rapid” Decline?

SPIE Let there be Light! High NA Kickoff! Samsung Slows? “Rapid” Decline?
by Robert Maire on 03-03-2024 at 6:00 am

High NA EUV 2024

– High NA EUV’s coming out party – “Dawn” of the Angstrom Era
– Well attended, positive vibes, not much new but good progress
– Concerns about Samsung slowing spend while Intel accelerates
– KLA reticle inspection quandary – Risky business in China

SPIE was a High-NA
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2024 Semiconductor Cycle Outlook – The Shape of Things to Come – Where we Stand

2024 Semiconductor Cycle Outlook – The Shape of Things to Come – Where we Stand
by Robert Maire on 01-24-2024 at 6:00 am

Semiconductor Industry Outlook 2024
  • What kind of recovery do we expect, if any, after 2 down years?
  • What impact will China have on the recovery of mature market chips?
  • What will memory recovery look like? Will we return to stupid spend?
  • Stock selection ever more critical in tepid recovery
Chip stocks have rocketed but the industry itself, not so much, “Anticipation….is
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Will Chiplet Adoption Mimic IP Adoption?

Will Chiplet Adoption Mimic IP Adoption?
by Eric Esteve on 12-28-2023 at 6:00 am

Adoption theory

If we look at the semiconductor industry expansion during the last 25 years, adoption of design IP in every application appears to be one of the major factors of success, with silicon technology incredible development by a x100 factor, from 250nm in 2018 to 3nm (if not 2nm) in 2023. We foresee the move to chiplet-based architecture… Read More


Podcast EP198: How Lightmatter Creates the Foundation for the Next Moore’s Law with Ritesh Jain

Podcast EP198: How Lightmatter Creates the Foundation for the Next Moore’s Law with Ritesh Jain
by Daniel Nenni on 12-15-2023 at 10:00 am

Dan is joined by Ritesh Jain. Ritesh is the senior vice president of engineering and operations for Lightmatter. Prior to joining Lightmatter, Ritesh was a vice president in Intel’s Data Center and AI group where he directed the hardware development across silicon packaging, power integrity, signal integrity, mechanical &… Read More


Uniquely Understanding Challenges of Chip Design and Verification

Uniquely Understanding Challenges of Chip Design and Verification
by Daniel Nenni on 11-14-2023 at 6:00 am

Jean Marie Brunet (1)

Jean-Marie Brunet is Vice President and General Manager of Siemens Hardware-Assisted Verification. He and I spoke recently about how different his hardware group is from the rest of the software-centric EDA product space and why a hardware-oriented EDA vendor like Siemens fully understands the challenges of the chip design… Read More


Gordon Moore’s legacy will live on through new paths & incarnations

Gordon Moore’s legacy will live on through new paths & incarnations
by Robert Maire on 03-25-2023 at 6:00 pm

Gordon Moore RIP

-Gordon Moore’s passing reminds us of how far we have come
-One of many pioneers of chip industry-but most remembered
-The most exponential & ubiquitous industry of all times
-“No exponential is forever”- Gordon Moore was an exponential

Remembering Gordon Moore

He will be remembered most for his observation… Read More


Keysight Expands EDA Software Portfolio with Cliosoft Acquisition

Keysight Expands EDA Software Portfolio with Cliosoft Acquisition
by Daniel Nenni on 02-23-2023 at 8:00 am

image001 14

During the day I do M&A work inside the semiconductor ecosystem and I have been part of more than a dozen acquisitions during my career so I know a good one when I see it and I see a great one with Keysight and Cliosoft, absolutely.

Cliosoft came to SemiWiki 12 years ago when we first went online so I know them quite well. With more than… Read More


Rethinking the System Design Process

Rethinking the System Design Process
by Daniel Nenni on 12-08-2022 at 10:00 am

Rethinking the System Design Process 1

The system design process can incorporate linear thinking, parallel thinking, or both, depending on the nature of the anticipated system, subsystem, or element of a subsystem. The structure, composition, scale, or focal point of a new/incremental system design incorporates the talents and gifts of the designer in either a … Read More


IEDM 2022 – Ann Kelleher of Intel – Plenary Talk

IEDM 2022 – Ann Kelleher of Intel – Plenary Talk
by Scotten Jones on 12-06-2022 at 10:00 am

Ann 2022 IEDM Plenary Dec. 5 Roadmap Slide

Ann Kelleher is Intel’s Executive Vice President, General Manager, Technology Development, and she gave the first plenary talk to kick off the 2022 IEDM, “Celebrating 75 Years of the Transistor A Look at the Evolution of Moore’s Law Innovation”. I am generally not a fan of plenary talks because I think they are often too broad and… Read More


Micron- “The first cut isn’t the deepest”- Chops production & forecast further

Micron- “The first cut isn’t the deepest”- Chops production & forecast further
by Robert Maire on 11-23-2022 at 6:00 am

Micron SemiWiki 2022

-Micron announces more production cuts & lower forecast
-DRAM will be negative- NAND sounds barely flat (for now)
-Capital spending to be cut to near zero- essential only
-Will the rest of the industry follow suit?

“The first cut isn’t the deepest”
(Apologies to Rod Stewart)

When Micron first announced… Read More