Semicon: Multiple Patterning vs EUV, round #1

Semicon: Multiple Patterning vs EUV, round #1
by Paul McLellan on 07-21-2013 at 9:01 pm

If you want to know the state of play in lithography, there is no better place than the special session on lithography at Semicon West. This year was no exception. The session was given the punchy title Still a tale of 2 paths: multi-patterning lithography at 20nm and below: EUVL source and infrastructure progress.

In the blue corner… Read More


SEMICON West: My Top Picks

SEMICON West: My Top Picks
by Paul McLellan on 06-20-2013 at 11:21 am

I will be at Semicon West from 9th to 11th July in Moscone, San Francisco. Of course there are lots of interesting sessions but here are two that I think are especially important to get a good impression of the way things are going in the future from experts. The two most interesting questions about the future are what comes after 14nm,… Read More


What does 3D IC, FinFETs, and EUV have in common?

What does 3D IC, FinFETs, and EUV have in common?
by Daniel Nenni on 06-19-2013 at 6:00 pm


They are three of the top trending terms on SemiWiki and three of the hot topics at this year’s Semicon West:

In its 43rd year, SEMICON West is the flagship annual event for the global microelectronics industry. It is the premier event for the display of new products and technologies for microelectronics design and manufacturing,Read More


Lithography from Contact Printing to EUV, DSA and Beyond

Lithography from Contact Printing to EUV, DSA and Beyond
by Paul McLellan on 03-05-2013 at 6:21 pm

I used my secret powers (being a blogger will get you a press pass) to go to the first day of the SPIE conference on advanced lithography a couple of weeks ago. Everything that happens to with process nodes seems to be driven by lithography, and everything that happens in EDA is driven by semiconductor process. It is the place to find … Read More


No EUV before 7nm?

No EUV before 7nm?
by Paul McLellan on 02-07-2013 at 1:31 pm

I was at the Common Platform Technology Forum this week. One of the most interesting sessions is IBM’s Gary Patton giving an overview of the state of semiconductor fabrication. Then, at lunchtime, he is one of the people that the press can question. In this post, I’m going to focus on Extreme Ultra-Violet (EUV) lithography.… Read More


Wafer Costs: Out of Control or Not?

Wafer Costs: Out of Control or Not?
by Paul McLellan on 01-01-2013 at 8:30 pm

I didn’t attend the International Electronic Device Meeting (IEDM) earlier this month, but there have been a lot of reports on the inter webs especially about 20nm and 14nm processes. Some of this is really geeky stuff but I think that perhaps the most interesting thing I’ve read about is summarized in this chart:

This… Read More


Waiting or EUV – Another View on the ReRAM Roadmap

Waiting or EUV – Another View on the ReRAM Roadmap
by Ed McKernan on 11-05-2012 at 9:03 pm

It is ‘Quarterly’ financial report time for many companies and one can occasionally find some interesting snippets in the transcripts of the calls which normally accompany these announcements. For example, SanDisk appear to have an encouraging quarter, reversing sales declines seen through Q1 and Q2. However, what caught … Read More


Traditional Model of Funding Semiconductor Equipment is Broken?

Traditional Model of Funding Semiconductor Equipment is Broken?
by Paul McLellan on 08-07-2012 at 7:30 pm

At Semicon a few weeks ago the big news was that Intel was making a big investment in ASML as a way of funding two development programs: extreme ultra-violet (EUV) and 450mm wafers. This week TSMC announced that they would join the program too, committing 275M Euros over a five year period. They are also taking a 5% stake in ASML. ASML… Read More


The Future of Lithography and the End of Moore’s Law!

The Future of Lithography and the End of Moore’s Law!
by Paul McLellan on 07-24-2012 at 10:35 pm

Thisblog with a chart showing that the cost of given functionality on a chip is no longer going to fall is, I think, one of the most-read I’ve ever written on Semiwiki. It is actually derived from data nVidia presented about TSMC, so at some level perhaps it is two alpha males circling each other preparing for a fight. Or, in this… Read More


EUV: No Pellicle

EUV: No Pellicle
by Paul McLellan on 07-22-2012 at 10:00 pm

There’s a dirty secret problem about EUV that people don’t seem to to be talking about. There’s no pellicle on a EUV mask. OK, probably you have no idea what that means, a lot of jargon words, nor why it would be important, but it seems to me it could be the killer problem for EUV.

In refractive masks, you print a pattern… Read More