SPIE Advanced Lithography 2018 – ASML Update on EUV

SPIE Advanced Lithography 2018 – ASML Update on EUV
by Scotten Jones on 04-09-2018 at 7:00 am

At the SPIE Advanced Lithography Conference in February ASML gave an update on their EUV systems, in this blog I will provide a summary of what they presented. I have also written about my impressions on EUV for the overall conference here.… Read More


SPIE Advanced Lithography 2018 – EUV Status

SPIE Advanced Lithography 2018 – EUV Status
by Scotten Jones on 03-05-2018 at 7:00 am

This year the Advanced Lithography Conference felt very different to me than the last couple of years. I think it was Chris Mack who proclaimed it the year of Stochastics. EUV has dominated the conference for the last several years but in the past the conversation has been mostly centered on the systems, system power and uptime.

I … Read More


Choosing the lesser of 2 evils EUV vs Multi Patterning!

Choosing the lesser of 2 evils EUV vs Multi Patterning!
by Robert Maire on 11-03-2017 at 12:00 pm

For Halloween this week we thought it would be appropriate to talk about things that strike fear into the hearts of semiconductor makers and process engineers toiling away in fabs. Do I want to do multi-patterning with the huge increase in complexity, number of steps, masks and tools or do I want to do EUV with unproven tools, unproven… Read More


Do investors understand the new memory paradigm?

Do investors understand the new memory paradigm?
by Robert Maire on 10-11-2017 at 7:00 am

Micron put up a great quarter beating both quarterly expectations and guidance. Even though the stock was up 8% and we still think it has a long way to go as investors have not fully embraced the upside ahead in the memory market.… Read More


SEMICON West – EUV Readiness Update

SEMICON West – EUV Readiness Update
by Scotten Jones on 08-11-2017 at 12:00 pm

At the imec technology forum held at SEMICON West, Martin Van Den Brink, President and CTO of ASML presented on the latest developments on EUV. I also had an opportunity to sit down with Mike Lercel, ASML Director of Strategic Marketing for an interview.… Read More


Semicap Thoughts: ASML AMAT INTEL SAMSUNG TSMC MICRON

Semicap Thoughts: ASML AMAT INTEL SAMSUNG TSMC MICRON
by Robert Maire on 07-27-2017 at 12:00 pm

ASML reported results in line and slightly ahead of expectations which helped push ASML and the other semicap stocks back to their original valuations prior to the two step pull back that lasted about a month. We are now back to relatively high, record valuations not seen or ever seen previously (at least for a long time) by many companies.… Read More


Standard Node Trend

Standard Node Trend
by Scotten Jones on 07-15-2017 at 4:00 pm

I have previously published analysis’ converting leading edge logic processes to “standard nodes” and comparing standard nodes by company and time. Recently updated details on the 7nm process node have become available and in this article, I will revisit the standard node calculations and trends.… Read More


SPIE 2017 – ASML Interview and Presentations

SPIE 2017 – ASML Interview and Presentations
by Scotten Jones on 04-19-2017 at 7:00 am

At the SPIE Advanced Lithography conference I sat down with Mike Lercel, Director of Strategic Marketing for ASML for an update. ASML also presented several papers at the conference and I attended many of these. In this article, I will discuss my interview with Mike and summarize the ASML presentations.… Read More


SPIE 2017 ASML and Cadence EUV impact on place and route

SPIE 2017 ASML and Cadence EUV impact on place and route
by Scotten Jones on 04-13-2017 at 7:00 am

As feature sizes have shrunk, the semiconductor industry has moved from simple, single-exposure lithography solutions to increasingly complex resolution-enhancement techniques and multi-patterning. Where the design on a mask once matched the image that would be produced on the wafer, today the mask and resulting image … Read More


Intel Manufacturing Day: Nodes must die, but Moore’s Law lives!

Intel Manufacturing Day: Nodes must die, but Moore’s Law lives!
by Scotten Jones on 03-29-2017 at 4:00 pm

Yesterday I attended Intel’s manufacturing day. This was the first manufacturing day Intel has held in three years and according to Intel their most in depth ever.

Nodes must die
I have written several articles comparing process technologies across the leading-edge logic producers – GLOBALFOUNDRIES, Intel, Samsung… Read More