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Fast Track your SoC Design

Fast Track your SoC Design
by Paul McLellan on 08-17-2011 at 5:24 pm

Atrenta has four seminars coming up on SoC realization. More and more design is actually about finding IP and integrating it together at the block level, and then handing it off to a standard RTL to GDSII flow. The three focus areas are:

  • finding quality IP faster
  • accelerating IP integration and SoC assembly
  • handing off RTL successfully.
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ANSYS Regional Conference

ANSYS Regional Conference
by Paul McLellan on 08-17-2011 at 3:15 pm

Next Tuesday, August 23rd, is the ANSYS Regional Conference for Silicon Valley. It takes place at the Techmart Network Meeting Center. Apache has three presentations during the day:

  • 9.25-9.45 Andrew Yang Introducing Apache Design Solutions
  • 11.00-11.30 Methodology for delivering power-efficient designs from concept to
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Mr. TTL’s Future is Analog: Time to Sell OMAP to Broadcom

Mr. TTL’s Future is Analog: Time to Sell OMAP to Broadcom
by Ed McKernan on 08-17-2011 at 1:00 am

Mr. TTL (otherwise known as Texas Instruments or TI) has had a great run in the cellular market but it is time to decamp. The future is Analog and OMAP must depart to one of the remaining players looking to win the Smartphone and Tablet market. TI is exiting the market so it can focus on the high volume analog market.

On first sight, the … Read More


Captain Ahab Calls Out for the Merger of nVidia and AMD

Captain Ahab Calls Out for the Merger of nVidia and AMD
by Ed McKernan on 08-16-2011 at 8:00 pm

Call me Ishmael. Some years ago –in the mid 1990s – having little or no money in my purse and nothing particular to interest me on shore, I thought I would sail the startup ship Cyrix and see the watery part of the PC world. Whenever I find myself grim about the mouth or pause before coffin warehouses, and bring up the rear of every funeral… Read More


Solido – Variation Analysis and Design Software for Custom ICs

Solido – Variation Analysis and Design Software for Custom ICs
by Daniel Payne on 08-15-2011 at 7:11 pm

Introduction
When I designed DRAM chips at Intel I wanted to simulate at the worst case process corners to help make my design as robust as possible in order to improve yields. My manager knew what the worst case corners were based on years of prior experience, so that’s what I used for my circuit simulations.… Read More


TSMC 28nm and 20nm Update!

TSMC 28nm and 20nm Update!
by Daniel Nenni on 08-15-2011 at 3:00 pm

First, I would like to congratulate Samsung on their first 20nm test chip press release. Some will say it is a foundry rookie mistake since real foundries do not discuss test chip information openly. I like it because it tells us that Samsung is 6-9 months BEHIND the number one foundry in the world on the 20nm (gate-last HKMG) process… Read More


Google buying Motorola

Google buying Motorola
by Paul McLellan on 08-15-2011 at 10:48 am

So Google is buying Motorola Mobility for $12.5B. If you are a partner of Google using Android then this has both upside and downside. The upside is that Motorola, having been in wireless for longer than almost anyone, presumably has a pretty good patent portfolio that can be used to defend against Apple, Nokia, Microsoft et al. The… Read More


Cadence VIP Seminar: next stop after Denali party, August 25th in San Jose

Cadence VIP Seminar: next stop after Denali party, August 25th in San Jose
by Eric Esteve on 08-15-2011 at 10:42 am

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If you did not have the chance to attend the famous Denali party at DAC 2011, you may want to go to Cadence VIP seminar to be held on Thursday, August 25, 2011, from 1:00 – 4:15pm at Cadence Headquarters: 2655 Seely Avenue, San Jose, Building 10. To register, click here. The atmosphere could be slightly different, as during DenaliRead More


OPC Model Accuracy and Predictability – Evolution of Lithography Process Models, Part III

OPC Model Accuracy and Predictability – Evolution of Lithography Process Models, Part III
by Beth Martin on 08-15-2011 at 7:00 am

Wyatt Earp probably wasn’t thinking of OPC when he said, “Fast is fine, but accuracy is everything,” but I’ll adopt that motto for this discussion of full-chip OPC and post-OPC verification models.

Accuracy
is the difference between the calibrated model prediction and the calibration wafer result. Accuracy depends on several… Read More


Will AMD Crash Intel’s $300M Ultrabook Party?

Will AMD Crash Intel’s $300M Ultrabook Party?
by Ed McKernan on 08-14-2011 at 7:00 am

Let’s face it, the ships are burning in the harbor and there is only one way out of here for AMD. It needs to crash Intel’s exclusive $300M Ultrabook Party in order to grab a slice of the future, more profitable PC market.

Intel Capital Creates $300 Million Ultrabook FundRead More