Dan is joined by Dr. Walden Rhines. Wally is a lot of things, CEO of Cornami, board member, advisor to many and friend to all. Today he is the Executive Sponsor of the SEMI Electronic Design Market Data Report.
Wally reviews the latest report with Dan. Overall growth was strong at 18.2% vs. Q2 2023. Employment for the sector was also … Read More
Dan is joined by Jakob Engblom this year’s vice chair and keynote chair for DVCon Europe. He’s been in the virtual platforms field since 2002, most recently as director of simulation technology ecosystem at Intel. His interests include simulation technologies, software and hardware testing and validation, programming… Read More
Dan is joined by Andrea Gallo, Vice President of Technology at RISC-V International. Andrea heads up the Technical Activities in collaboration with RISC-V members across workgroups and committees in growing the adoption of the RISC-V Instruction Set Architecture. Prior to RISC-V International, Andrea held multiple roles… Read More
Dr. Nikhil Balram has over 25 years of experience in the semiconductor and display industries. Past executive roles include CEO of EyeWay Vision Inc., a startup developing immersive AR glasses, Head of the Display Group at Google, responsible for developing display systems for all Google consumer hardware, including AR and … Read More
Part 3 of this 4-part series analyzes methods and tools involved in debugging software at different layers of the software stack.
Software debugging involves identifying and resolving issues ranging from functional misbehaviors to crashes. The essential requirement for validating software programs is the ability to monitor… Read More
Functional coverage acts as a guide to direct verification resources by identifying the tested and untested portions of a design. Functional coverage is a user-defined metric that assesses the extent to which the design specification, as listed by the test plan’s features, has been used. It can be used to estimate the presence… Read More
Synopsys made significant announcements during the recent TSMC OIP Ecosystem Forum, showcasing a range of cutting-edge solutions designed to address the growing complexities in semiconductor design. With a strong emphasis on enabling next-generation chip architectures, Synopsys introduced both new technologies and … Read More
In semiconductor design there has been much fascination around the idea of using large language models (LLMs) for RTL generation; CoPilot provides one example. Based on a Google Scholar scan, a little over 100 papers were published in 2023, jumping to 310 papers in 2024. This is not surprising. If it works, automating design creation… Read More
Designing custom silicon for AI applications is a particularly vexing problem. These chips process enormous amounts of data with a complex architecture that typically contains a diverse complement of heterogeneous processors, memory systems and various IO strategies. Each of the many subsystems in this class of chip will … Read More
More Headwinds – CHIPS Act Chop? – Chip Equip Re-Shore? Orders Canceled & Fab Delay