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Intel’s x86 – Foundry Breakup Comes into View

Intel’s x86 – Foundry Breakup Comes into View
by Ed McKernan on 02-21-2013 at 12:46 am

The announcement by Intel during their January earnings call that they were going to hike Capex in 2013 over 2012 left many folks scrambling as to the reasons and the what-the hecks? Here was a company that was exiting 2012 with 50% utilization of their advanced 22nm process and yet signaling more building was to come. Furthermore,… Read More


Prediction is very difficult, especially about the future

Prediction is very difficult, especially about the future
by Bill Jewell on 02-20-2013 at 8:01 pm

The above quote is attributed to both physicist Niels Bohr and baseball’s Yogi Berra. The statement certainly applies to predicting the semiconductor market. Semiconductors operate on physical principles. However the market for semiconductors is affected by numerous factors. The outcome of a baseball game can be determinedRead More


Cadence ♥ ClioSoft!

Cadence ♥ ClioSoft!
by Daniel Nenni on 02-20-2013 at 5:00 pm

Taking a look at the coveted presentation slots at the CDNLive Conference next month you will see a presentation on Data Management for Mixed-Signal Designs by one of my favorite EDA companies, ClioSoft. Great software, great support, great people, and with customers that are willing to talk publicly about their tools and technology.… Read More


SPICE Circuit Simulation at STMicroelectronics

SPICE Circuit Simulation at STMicroelectronics
by Daniel Payne on 02-20-2013 at 11:18 am

At the 2010 DACI moderated a panel session on SPICE and Fast SPICE circuit simulation, and one of the panelists was PierLuigi Dagliofrom STMicroelectronics. To get an update on SPICE circuit simulation at ST I read a PDF document at Mentor titled: Improving the Quality of SPICE Simulation Results with Eldo Premier at ST.


ST does … Read More


TSMC ♥ Cadence

TSMC ♥ Cadence
by Daniel Nenni on 02-19-2013 at 11:00 am

In a shocking move TSMC now favors Cadence over Synopsys! Okay, not so shocking, especially after the Synopsys acquisitions of Magma, Ciranova, SpringSoft, and the resulting product consolidations. Not shocking to me at all since my day job is Strategic Foundry Relationships for emerging EDA, IP, and fabless companies.

Rick… Read More


SHIELDing the Android GPU developer in C

SHIELDing the Android GPU developer in C
by Don Dingee on 02-18-2013 at 12:52 pm

Repeat after me: SoCs are paperweights if they can’t be programmed. Succeeding with a new part today means supporting a robust developer program to attract and engage as many creatives as possible. NVIDIA has teamed up with Mentor Graphics in just such an adventure. If you read just the press release, you may have missed the real … Read More


Mentor Shines at DVCon

Mentor Shines at DVCon
by Beth Martin on 02-18-2013 at 12:30 am

Mentor Graphics will be all over DVCon next week (February 25-28) at the DoubleTree hotel in San Jose.

In addition to attending all the panels, tutorials, posters, and the keynote, you can visit Mentor in booth 901 on the exhibit floor.
Here’s the lineup of Mentor-related events:… Read More


Why IP Must Be Defended

Why IP Must Be Defended
by Randy Smith on 02-17-2013 at 7:00 pm

A few years ago I was having breakfast with Jim Hogan at our favorite place to meet in Los Gatos. I was CEO of Polyteda and Jim was Chairman so we always had plenty to talk about. This time, however, the talk had turned to protecting a company’s intellectual property (IP). Jim had brought up the topic in the context of the looming legal … Read More


ISSCC 2013: Circuit Design Using FinFETs!

ISSCC 2013: Circuit Design Using FinFETs!
by Daniel Nenni on 02-16-2013 at 8:00 pm


One of the privilages of blogging for SemiWiki is invitations to the top conferences around the world including the International Solid-State Circuits Conference (ISSCC) in San Francisco this week. Amazing, this conference is older than I am:

ISSCC 2013 is the 60th Conference in an incredibly long-lasting series. FollowingRead More


Aldec Delivers Leading Verification Methodologies!

Aldec Delivers Leading Verification Methodologies!
by Daniel Nenni on 02-14-2013 at 8:15 pm

For those of you who don’t know, Aldec Inc., headquartered in Henderson, Nevada, is an industry leader in Electronic Design Verification and offers a patented technology suite including: RTL Design, RTL Simulators, Hardware-Assisted Verification, ASIC Prototyping, Design Rule Checking, IP Cores, DO-254 Functional Verification… Read More