Array
(
    [content] => 
    [params] => Array
        (
            [0] => /forum/threads/intel-breaks-ground-on-santa-clara-facility-to-boost-euv-photomask-capacity-for-future-nodes.25422/
        )

    [addOns] => Array
        (
            [DL6/MLTP] => 13
            [Hampel/TimeZoneDebug] => 1000070
            [SV/ChangePostDate] => 2010200
            [SemiWiki/EmailDomainReplace] => 1000010
            [SemiWiki/Newsletter] => 1000010
            [SemiWiki/WPMenu] => 1000010
            [SemiWiki/XPressExtend] => 1000010
            [ThemeHouse/XLink] => 1000970
            [ThemeHouse/XPress] => 1010570
            [XF] => 2031070
            [XFI] => 1060170
        )

    [wordpress] => /var/www/html
)

Intel Breaks Ground on Santa Clara Facility to Boost EUV Photomask Capacity for Future Nodes

Intel is pushing forward with its U.S. manufacturing expansion as demand for its foundry services grows among major technology companies, including Apple and NVIDIA. The chipmaker has officially broken ground on a new expansion at its Santa Clara, California campus, with CEO Lip-Bu Tan and other senior executives on hand for the ceremony.
The groundbreaking confirms that Intel remains on schedule, as the project had originally been slated to begin in mid-2026.

Timing may carry added significance beyond Intel's internal roadmap. A separate report from Tom's Hardware notes that semiconductor and advanced manufacturing projects must break ground before December 31, 2026, in order to qualify for a 35% Investment Tax Credit — an incentive that will no longer be available to projects launched in 2027 or later.

Details of the Santa Clara Expansion

Per a report from the San Francisco Business Times, Intel's expansion is taking shape at its Bowers Campus in Santa Clara, covering a 107,000-square-foot site. The development will consist of two three-story buildings dedicated to manufacturing, fabrication, and central utility functions. Wccftech reports that the facility will be used to produce EUV photomasks, or reticles, which are essential components for Intel's upcoming process nodes, including 18A-P and 14A.

Fab 52 and Intel's Broader Arizona Strategy

The Santa Clara project is part of a wider push tied to Intel's 18A and 14A manufacturing ambitions. Central to that effort is Fab 52, located at Intel's Ocotillo campus in Chandler, Arizona, which Tom's Hardware describes as a core pillar of the company's production strategy. The fab entered high-volume manufacturing in October 2025 — Intel's first facility to do so on the 18A node — beginning with Panther Lake compute tiles before adding Clearwater Forest production later this year.
Citing CNBC, the report states that Fab 52 is built to handle more than 10,000 18A wafer starts per week, which could scale to approximately 40,000 wafer starts per month at full capacity. That figure would surpass the combined output of TSMC's Fab 21 Phase 1 and Phase 2 facilities in Arizona.
Looking further ahead, Intel's next major Arizona buildout, Fab 62, is expected to begin production around 2028. Intel has not confirmed which process node the fab will support, but Tom's Hardware suggests it could serve as a flexible option — either producing 14A chips if the company's Ohio site experiences further delays, or adding extra 18A capacity should market demand exceed current projections.

Ohio Remains Intel's Slowest-Moving Project

By contrast, Intel's Ohio facility continues to lag behind the rest of its expansion pipeline. Construction began in 2022 as part of a $28 billion investment, but the company has since pushed back its timeline: Phase 1 is now expected to be completed by 2030, with operations starting between 2030 and 2031, followed by Phase 2 production in 2032.

( Information from Wccftech, Tom’s Hardware, San Francisco Business Times and CNBC.)
 
Details of the Santa Clara Expansion

Per a report from the San Francisco Business Times, Intel's expansion is taking shape at its Bowers Campus in Santa Clara, covering a 107,000-square-foot site. The development will consist of two three-story buildings dedicated to manufacturing, fabrication, and central utility functions. Wccftech reports that the facility will be used to produce EUV photomasks, or reticles, which are essential components for Intel's upcoming process nodes, including 18A-P and 14A.
EUV mask lifetime is a serious issue.

 
Back
Top