The headquarters of ST Microelectronics is officially in Switzerland, but in many ways the center of gravity is in the Grenoble area. You may have heard of Crolles where ST does process development, manufacturing and more, which is about ten miles north-east of the city. As a result, along with the CEA-LETI and Grenoble Institute… Read More
New Cooling Strategies for Future ComputingPower densities on chips increased from 50-100 W/cm2…Read More
DAC News – proteanTecs Unlocks AI Hardware Growth with Runtime MonitoringAs AI models grow exponentially, the infrastructure supporting…Read More
Sophisticated soundscapes usher in cache-coherent multicore DSPDigital audio processing is evolving into an art…Read More
A Quick Look at Agentic/Generative AI in Software EngineeringAgentic methods are hot right now since single…Read More
Advances in Nanometer Analog and Mixed Signal Design!
Mentor’s annual user group meeting at the Doubletree Hotel in San Jose, CA is coming up on Tuesday, April 21[SUP]st[/SUP]. This complementary event provides a unique opportunity to share design techniques and exchange ideas with other users and experts in the design community. As you may have read I am the star of the show; moderating… Read More
Silicon Valley, It’s About Culture
Spreading the culture of Silicon Valley is the best way to take the US and the world to a better place. This culture is already spreading, but many organizations and especially governments are doing everything possible to hold on to the past to the detriment of all. Silicon Valley/US businesses have made the strongest statement … Read More
Silicon Catalyst’s Launch Party at Avaya Stadium
There is a new stadium in town. No, not Levi’s Stadium where the 49ers play, that one is already a year old. There is Avaya Stadium over near San Jose airport. 1123 Coleman Avenue if you want to be precise. This is a purpose-built soccer stadium where the San Jose Earthquakes play. Their season just started in February.
But on … Read More
Beyond CMOS: Three Industry Teams Aim at Next Generation of High-performance Computing
Given the current limitations with CMOS designs, such as low temperature thresholds and efficiency in power consumption, there is a vast need to expand into superconducting computers in order to manage consumers’ need for power and performance. Although supercomputers require extremely low temperatures, they are capable… Read More
Safety Dominates Agenda in DAC’s Automotive Track
The connected car movement is in full bloom, making headlines in the trade media on how the cutting-edge electronics will transform the twenty-first century driving experience. However, a closer look at the Internet of cars juggernaut shows that safety and security of the networked vehicle are still a major stumbling block.… Read More
Sidense NVM Scores Qualification on GLOBALFOUNDRIES 28nm SLP and HPP
A tremendous number of chips being designed for today’s products require some sort of onboard data storage. The size of these needs range from a handful of bytes, for trim and calibration storage, to something much more substantial like boot code storage. In both of these examples the storage ideally should be nonvolatile, with… Read More
TSMC Unleashes Aggressive 28nm Strategy!
The most interesting presentation at the jam-packed TSMC Symposium last week for me was “Advanced Technology Updates” by Dr. BJ Woo. Coincidentally, I met with BJ during my last visit to Fab 12. Much of what we discussed was about TSMC being more aggressive this year but I wasn’t able to really connect the dots until her presentation.… Read More
Xilinx at NAB: Any Media Over Any Network
The NAB (National Association of Broadcasters) show has just started, April 11-16th in Las Vegas. It covers a very broad range of topics:
As the premier trade association for broadcasters, NAB advances the interests of our members in federal government, industry and public affairs; improves the quality and profitability of … Read More
Cu-Pillar in Advanced Logic Devices
In 2001, flipchip with solder bump was already a dominant technology and it was replacing wire bonding as the main interconnection choice for a growing number of devices. It was offering fine pitch interconnections for increased I/O counts. In the solder bump process, a bump is formed on the chip and on the package substrate and … Read More
Memory Innovation at the Edge: Power Efficiency Meets Green Manufacturing