Jitter: The Overlooked PDN Quality MetricBruce Caryl is a Product Specialist with Siemens EDA…Read More
CEO Interview with Vamshi Kothur, of Tuple TechnologiesIt was my pleasure to meet with Vamshi…Read More
Webinar – Power is the New Performance: Scaling Power & Performance for Next Generation SoCsWhat if you could reduce power and extend…Read More
Reachability in Analog and AMS. Innovation in VerificationCan a combination of learning-based surrogate models plus…Read More
It’s been the case most of the time that until we hit a bottleneck situation, we do not realize that our focus is not at the right spot. Similar is the case with power analysis at the SoC level. Power has become equally if not more important than the functionality and other parameters of an SoC, and therefore has to be verified earlier … Read More
I did not know Dr. Sanjay Jha prior to this meeting but I certainly knew of him from his time at Qualcomm. It seemed a bit odd for me to fly to Dresden to meet a man that is based here in Silicon Valley but that made the meeting all that more interesting. Especially after finding out the German Chancellor Angela Merkel would also be visiting… Read More
AMS IC designers have a lot to think about when crafting transistor-level designs to meet specifications and schedules, so the most-used tool in their kit is the trusted SPICE or FastSPICE circuit simulator to help analyze timing, power, sensitivity and even device noise. I just did a Google search for “device noise analysis… Read More
Over the last couple of weeks, FD-SOI has been in the news with GlobalFoundries announcement of a 22nm FD-SOI process that will run in the Dresden Fab. Also, earlier in the week I talked to Thomas Skotnicki about the saga (and it is a saga) of how FD-SOI got from his PhD thesis to volume manufacturing and global deployment. But there … Read More
Quarterly earning calls are a great source of information but they can also be a source of confusion and generally it is an unhealthy combination of the two. On one hand these earning calls are to appease the financial community. On the other hand, in my opinion, these calls are also used to generate fear, uncertainty, and doubt amongst… Read More
It seems to be FD-SOI week yet again. I talked to Thomas Skotnicki this morning. He is the father of thin-box FD-SOI and its birth is an interesting story. The story began 26 years ago (so not quite as far back as the photo!).
Thomas is of Polish origins (he is actually Tomeczek) and grew up in Warsaw where he earned his PhD. In 1983 in Canterbury,… Read More
Everyone has heard the expression, “Half the job is having the right tool.” In the case of FPGA-based prototyping, however, the right tool for the job is only the beginning. What teams really need to think through is what exactly should be done with an FPGA-based prototyping tool?
The obvious answer is prototyping an SoC, pre-silicon.… Read More
There is obviously a broad spectrum of semiconductor IP but broadly speaking it seems to fall into three buckets:
Foundation IP is where it all started. When I was at Compass Design Automation in the 1990s that was pretty much what… Read More
Although primarily developed for military operations, this cutting-edge satellite technology was eventually allowed for civilian applications. The first interagency testing of GPS receivers was conducted in California in 1984. By July 1995, using Navstar constellation, GPS was fully operational across the country. Automotive… Read More
Tuesday morning press briefing
The show started for me Tuesday morning with the SEMI press briefing. SEMI said there are 1,200 booths this year, 629 exhibiting companies and over 180 hours of programming. They also said pre-registration was up from last year and they expect 26,000 visitors.
Dan Tracy then gave an update on the markets.… Read More
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Facing the Quantum Nature of EUV Lithography