Ceva webinar AI Arch SEMI 800X100 250625

Why ARM Enabling Easy Access to Customized SOC’s Matters

Why ARM Enabling Easy Access to Customized SOC’s Matters
by Tom Simon on 10-14-2015 at 7:00 am

The introduction of the Arduino heralded the huge growth and interest in MCU based designs by people who could never before easily put together the hardware and software system required for implementation of their ideas. I remember the first time I saw the Arduino in use. I was at a talk on how a system for controlling propane jet solenoids… Read More


Optimizing Quality-of-Service in a Network-on-Chip Architecture

Optimizing Quality-of-Service in a Network-on-Chip Architecture
by Tom Dillinger on 10-13-2015 at 12:00 pm

The Linley Group is well-known for their esteemed Microprocessor Report publication, now in its 28th year. Accompanying their repertoire of industry reports, TLG also sponsors regular conferences, highlighting the latest developments in processor architecture and implementation.

One of the highlights of the conference… Read More


Convolutional Deep Neural Network is now a reality with CEVA-XM4

Convolutional Deep Neural Network is now a reality with CEVA-XM4
by Eric Esteve on 10-13-2015 at 7:00 am

XM4 DSP has been enriched with CEVA Deep Neural Network (CDNN) Software Framework. Some explanation could be useful before jumping into CDNN. The “Deep” of CDNN comes from “Deep Learning”, a family of neural network methods using high number of layers, so a deep network. The most popular deep learning neural network method is the… Read More


Wi-Fi Pioneers: Where are they now?

Wi-Fi Pioneers: Where are they now?
by Majeed Ahmad on 10-12-2015 at 4:00 pm

Wi-Fi is the unsung hero of the mobile revolution. Some people even call it the real Internet. In retrospect, smartphones took off partly because Apple forced mobile operators to seriously consider handsets with Wi-Fi capabilities. Now Wi-Fi is an intrinsic networking component serving smartphones, tablets and notebook computers… Read More


SpyGlass World at Levi Stadium, October 21st

SpyGlass World at Levi Stadium, October 21st
by Bernard Murphy on 10-12-2015 at 2:00 pm

I suppose you might have something better to do next Wednesday but, seriously, it had better be pretty good. I admit I’m biased (I was the Atrenta CTO until very recently) but even given that and mixing metaphors, Atrenta really knocked it out of the park when they got the 49er stadium for their User Group meetings. You don’t have to … Read More


3 Self-Service Semiconductor Design and Manufacturing Wins!

3 Self-Service Semiconductor Design and Manufacturing Wins!
by Daniel Nenni on 10-12-2015 at 12:00 pm

As the semiconductor consolidation continues and thousands of semiconductor professionals update their LinkedIn profiles, the march to create new silicon opportunities is increasing at a rapid pace. It is 1980s deja vu all over again when the fabless business model reenergized the semiconductor industry and brought affordable… Read More


Tensilica 4th generation DSP IP is a VPU

Tensilica 4th generation DSP IP is a VPU
by Eric Esteve on 10-12-2015 at 7:00 am

You may not know Tensilica DSP IP core, but you probably use Tensilica DSP powered systems in your day to day life. Every year, over 2 billion DSP cores equip IC in thousands of designs supporting IoT, Mobile Phones, Storage/SSD, Networking, Video, Security, Cameras… and more. Why DSP processing, the foundation of all Tensilica… Read More


Meeting DFM Challenges with Hierarchical Fill Data Insertion

Meeting DFM Challenges with Hierarchical Fill Data Insertion
by Tom Dillinger on 10-11-2015 at 12:00 pm

To describe the latest methodology for the addition of Design for Manufacturability fill shapes to design layout data, it’s appropriate to borrow a song title from Bob Dylan – The Times They Are A Changin’. The new technical requirements are best summarized as: “The goal is now to add as much fill as possible, which (ideally) looksRead More


Applying EDA Concepts Outside Chip Design

Applying EDA Concepts Outside Chip Design
by Bernard Murphy on 10-11-2015 at 7:00 am

(I changed the title of this piece as an experiment) Paul McLellan recently wrote on the topic of new ventures crossing the chasm (getting from initial but bounded success to a proven scalable business). That got me to thinking about the EDA market in general. In some ways it has a similar problem, stuck at $5B or so and single-digit… Read More


S2C ships UltraScale empowering SoFPGA

S2C ships UltraScale empowering SoFPGA
by Don Dingee on 10-10-2015 at 7:00 am

Most of the discussion around Xilinx UltraScale parts in FPGA-based prototyping modules has been on capacity, and that is certainly a key part of the story. Another use case is developing, one that may be even more important than simply packing a bigger design into a single part without partitioning. The real win with this technology… Read More