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Exploring USB Type-C DRP to USB Type-C DFP connection using USB C-Thru

Exploring USB Type-C DRP to USB Type-C DFP connection using USB C-Thru
by Rajaram Regupathy on 02-17-2016 at 12:00 pm

In a USB Type-C environment configuration process between a DRP and a DFP is as follows:

  • DRP to DFP attach/detach detection
  • Plug orientation detection
  • Initial DRP to DFP and power relationship detection
  • USB Type-C VBus current detection and usage
Read More

A Real Engineering Challenge – Artificial Red Blood Cells

A Real Engineering Challenge – Artificial Red Blood Cells
by Bernard Murphy on 02-17-2016 at 7:00 am

When you’re thinking about “what can we do next”, you can think big or you can think small – very, very small. Robert Freitas at the Institute for Molecular Manufacturing (IMM) has such an idea – artificial red blood cells (RBCs). These would be nano-machines which could augment the oxygen and carbon dioxide carrying capacity of … Read More


The (not so) Easy Life of an SOC Design Integrator

The (not so) Easy Life of an SOC Design Integrator
by Tom Simon on 02-16-2016 at 3:00 pm

How can large SOC projects effectively integrate sub blocks and IP into a stable version for release or internal development? The person responsible for integrating SOC sub blocks into a validated configuration for release has a difficult task. Usually there are many sub-blocks, each undergoing their own development. There… Read More


IoT implementation and Challenges!

IoT implementation and Challenges!
by Ahmed Banafa on 02-16-2016 at 12:00 pm

The Internet of Things (IoT) is the network of physical objects—devices, vehicles, buildings and other items which are embedded with electronics, software, sensors, and network connectivity, which enables these objects to collect and exchange data. Implementing this concept is not an easy task by any measure for many reasons… Read More


DDR4 is a complex interface to verify — assistance needed!

DDR4 is a complex interface to verify — assistance needed!
by Tom Dillinger on 02-16-2016 at 7:00 am

The design of parallel interfaces is supposed to be (comparatively) easy — e.g., follow a few printed circuit board routing guidelines; pay attention to data/clock/strobe signal lengths and shielding; ensure good current return paths (avoid discontinuities); match the terminating resistances to the PCB trace impedance;… Read More


NHTSA and Google’s War on Drivers

NHTSA and Google’s War on Drivers
by Roger C. Lanctot on 02-15-2016 at 4:00 pm

Google and the National Highway Traffic Safety Admnistration (NHTSA) have recently joined forces in a battle against drivers. It is an unusual alliance and one with significant implications for the future of automotive safety in the U.S. and globally.

That alliance was manifest this week in a letter sent by NHTSA to Chris Urmson… Read More


Automotive Augmented Reality Applications Insights from Patents

Automotive Augmented Reality Applications Insights from Patents
by Alex G. Lee on 02-15-2016 at 12:00 pm

US20150202962 illustrates a system for controlling vehicle features via an augmented reality vehicle user interface. The system includes an image capturing device for capturing an image of the vehicle. The system identifies the points of interest that correspond to the vehicle features within portions of the image of the vehicle… Read More


Does the Internet of Things need new Artificial Intelligence?

Does the Internet of Things need new Artificial Intelligence?
by Akeel Attar on 02-14-2016 at 12:00 pm

Judging by the number of confusing posts, blogs and articles on this topic, anyone exploring the potential of what the IOT can deliver to their business/organisation can be forgiven for thinking that the IOT will need a new set of AI technologies to work correctly. Throw into the mix the hype that the IOT will need big data analytics… Read More


Reconfigurable redefined with embedded FPGA core IP

Reconfigurable redefined with embedded FPGA core IP
by Don Dingee on 02-12-2016 at 7:00 am

On November 1, 1985, before anyone had heard the phrase field programmable gate array, Xilinx introduced what they called a “new class of ASIC” – the XC2064, with a whopping 1200 gates. Reconfigurable computing was born and thrived around the RAM-based FPGA, whose logic and input/output pins could be architected into a variety… Read More


ARM POPs Another One!

ARM POPs Another One!
by Daniel Nenni on 02-11-2016 at 4:00 pm

ARM announced a new POP deal with UMC 28nm last week. POP stands for Processor Optimized Package meaning physical IP libraries (logic and memory) are customized for ARM processor cores and mainstream EDA tools creating a platform for optimized chip design. POP is a much bigger deal than most people realize so let’s get into a little… Read More