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How 16nm and 14nm FinFETs Require New SPICE Simulators

How 16nm and 14nm FinFETs Require New SPICE Simulators
by Daniel Payne on 02-07-2016 at 7:00 am

About 35 years ago the first commercial SPICE circuit simulators emerged and they were quickly put to work helping circuit designers predict the timing and power of 6um NMOS designs. Then we had to limit our circuit simulations to just hundreds of transistors and interconnect elements to fit into the RAM and complete simulation… Read More


The Next Wave of Semiconductor Companies!

The Next Wave of Semiconductor Companies!
by Daniel Nenni on 02-06-2016 at 7:00 am

As we all know, venture capital has all but disappeared for semiconductor companies. Do semiconductor startups still exist and where do they come from? I ask these questions quite frequently but bloggable answers are hard to come by. When I asked Mike Gianfagna of eSilicon during ISSCC he reminded me of an old new source of emerging… Read More


Let’s Reduce Wasted Energy in Server Farms

Let’s Reduce Wasted Energy in Server Farms
by Alex Lidow on 02-05-2016 at 4:00 pm

With the growth in streaming video and the promises of 50 billion IoT gadgets making our lives oh-so-much better, there is an alarming demand for online computational horsepower and bandwidth.

Why alarming? In 2014, data centers in the United States consumed approximately 100 billion kilowatt hours (kWh) of energy. According
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Qualcomm goes in Data Center thanks to Google

Qualcomm goes in Data Center thanks to Google
by Eric Esteve on 02-05-2016 at 12:00 pm

The Server SoC at the heart of Data Center almost don’t care about power consumption, at the opposite of Application Processors for smartphone. If you design a server multi-core SoC, you target the highest performance, in fact a combination of high frequency and lowest possible latency, and try to pack as many CPU core and embedded… Read More


Supernovae and Safety

Supernovae and Safety
by Bernard Murphy on 02-05-2016 at 7:00 am

Whenever we push the bounds of reliability in any domain, we run into new potential sources of error. Perhaps not completely new, but rather concerns new to that domain. That’s the case for Single Event Upsets (SEUs) which are radiation-triggered bit-flips, and Single Event Transients (SETs) which are radiation-triggered pulses… Read More


Pathfinding to an Optimal Chip/Package/Board Implementation

Pathfinding to an Optimal Chip/Package/Board Implementation
by Tom Dillinger on 02-04-2016 at 4:00 pm

A new term has entered the vernacular of electronic design engineering — pathfinding. The complexity of the functionality to be integrated and the myriad of chip, package, and board technologies available make the implementation decision a daunting task. Pathfinding refers to the method by which the design space of technology… Read More


Here is what ‘‘Internet of Things’’ will do for Intelligent Transportation

Here is what ‘‘Internet of Things’’ will do for Intelligent Transportation
by Raj Kosaraju on 02-04-2016 at 12:00 pm

Transportation sector is growing, and we can already see that a fleet of autonomous, shared vehicles – connected to the road infrastructure, to the Internet and to a broader network of public transit options – will create incredible value. The transport sector is trying its level best to improve the safety, reliability, and cost… Read More


Cadence Adds New Dimension to SoC Test Solution

Cadence Adds New Dimension to SoC Test Solution
by Pawan Fangaria on 02-04-2016 at 7:00 am

It requires lateral thinking in bringing new innovation into conventional solutions to age-old hard problems. While the core logic design has evolved adding multiple functionalities onto a chip, now called SoC, the structural composition of DFT (Design for Testability) has remained more or less same based on XOR-based compression… Read More


Updated tool cuts through DO-254 V&V chaos

Updated tool cuts through DO-254 V&V chaos
by Don Dingee on 02-03-2016 at 4:00 pm

Audits. The mere mention of the word keeps project managers up at night and sends most designers running. However, in the case of FPGA designs seeking DO-254 compliance, the product doesn’t ship until the audit is complete – there is no avoiding it, or skating around it.… Read More