Having worked with Qualcomm in many different capacities during my career I can tell you there are some amazing people in and around that company. I am always positive when people I know are considering working there and QCOM people who leave are an easy reference for other jobs. Unfortunately, I lost respect for the QCOM higher ups… Read More
MediaTek Dimensity 9500 Unleashes Best-in-Class Performance, AI Experiences, and Power Efficiency for the Next Generation of Mobile DevicesIn a bold move to dominate the premium…Read More
CEO Interview with Adam Khan of Diamond QuantaKey Takeaways Diamond Quanta is bringing diamond out…Read More
Rise Design Automation Webinar: SystemVerilog at the Core: Scalable Verification and Debug in HLSKey Takeaways - High-Level Synthesis (HLS) delivers not…Read More
How to protect #IoT devices from software attacks!
#IoT devices are supposed to function properly in the field for many years without human intervention. Given that we know in advance that each #IoT node is going to be hacked in the future, it is essential that some trusted code be isolated from that hack to restore the #IoT application code to a known good state.… Read More
Uber is a Cancer!
Uber’s marketing and public relations afterburners are running at full blast with a new CEO, new driver rules and promises to make amends and “turn the company around” – whatever that means. If Uber is sincere about making changes it may find itself at war with its own nature.
Uber is a liar and a thief.… Read More
Embedded FPGA IP as a Post-Silicon Debugger
The hardware functionality of a complex SoC is difficult to verify. Embedded software developed for a complex, multi-core SoC is extremely difficult to verify. An RTOS may need to be ported and validated. Application software needs to be developed, and optimized for performance. Sophisticated methodologies are employed to… Read More
Solido Debuts New ML Tool at TSMC OIP!
The TSMC OIP Ecosystem Forum is upon us and what better place to debut a new tool to prevent silicon failures. Solido Design Automation just launched its latest tool – PVTMC Verifier – and will be demonstrating it in their booth at OIP. This is the third product that was developed within its Machine Learning Labs and is… Read More
Webinar: Aiding ASIC Design Partitioning for multi-FPGA Prototyping
The advantages of prototyping a hardware design on a FPGA platform are widely recognized, for software development, debug and regression in particular while the ultimate ASIC hardware is still in development. And if your design will fit into a single FPGA, this is not an especially challenging task (as long as you know your way … Read More
Can the iPhone rollout lift the industry?
We are in the midst of a number of cross currents buffeting the industry. The Korea risk seems to have escalated again and our government has thrown fuel on the fire by threatening trade agreements at the most inopportune timing possible. However we are also a week away from the roll out of one of the most anticipated Iphones ever which… Read More
A Delicate Choice – Emulation versus Prototyping
Hardware-assisted verification has been with us (commercially) for around 20 years and at this point is clearly mainstream. But during this evolution it split into at least two forms (emulation and prototyping), robbing us of a simple choice – to hardware-assist or not to hardware-assist (that is the question). Which in turn … Read More
CTO Interview: Ty Garibay of ArterisIP
ArterisIP has been a SemiWiki subscriber since the first year we went live. Thus far we have published 61 Arteris related blogs that have garnered close to 300,000 visits making Arteris and NoC one of our top attractions, absolutely.
One of the more newsworthy announcements this week is the addition of Ty Garibay to the Arteris executive… Read More
Breakfast with Aart de Geus and the Foundries!
Being the number one EDA and the number one IP company does have its advantages and the resulting foundry relationships are a clear example. One of the DAC traditions that I truly enjoy is the Synopsys foundry breakfasts. Not only does Synopsys welcome scribes, they reserve a table up front for us and Synopsys CEO Aart de Geus has been… Read More
Scaling Debug Wisdom with Bronco AI