An Insight into Building Quantum ComputersGiven my physics background I’m ashamed to admit…Read More
I Have Seen the Future with ChipAgents Autonomous Root Cause AnalysisI have seen a lot of EDA tool…Read More
Arm FCSA and the Journey to Standardizing Open Chiplet-Based DesignI have written before about an inter-chiplet communication…Read More
Revolution EDA: A New EDA Mindset for a New EraMurat Eskiyerli, PhD, is the founder of Revolution…Read More
Two months ago most forecasts called for a decline in the semiconductor market in 2020 as reported in our Semiconductor Intelligence May 2020 newsletter. The outlook changed in June, as the Worldwide Semiconductor Trade Statistics (WSTS) consensus forecast projected 3.3% growth in 2020. This month IC Insights revised its IC
Waving white surrender flag as TSMC dominates-
The quarter was a success but the patient is dying-
Packaging now critical as Moore progress stumbles-
Intel reported a great quarter but weak H2 guidance-
But 7NM slip and “fab lite” talk sends shockwaves-
Intel reported a great quarter beating numbers all around with… Read More
It has become a cliché to start a blog post with a cliché, for example “Chip designs are forever getting larger and more complex” or “Verification now consumes 60% of a project’s resources.” Therefore, I’ll open this post with another cliché: “Designers need to know only one language, but verification engineers must know many.”… Read More
Alchip issued a press announcement recently entitled Alchip Provides Supercomputer Processor Design Support. The release is literally a tour de force of technology, with many advanced design and packaging accomplishments. First, let’s examine the basics of the design.
Preferred Networks, Inc (PFN) is the customer. They … Read More
The revolutionary Intel 8086 microprocessor was introduced 42 years ago this month so I’ve been studying its die.1 I came across two 8086 dies with different sizes, which reveal details of how a die shrink works. The concept of a die shrink is that as technology improved, a manufacturer could shrink the silicon die, reducing… Read More
When Analog FastSPICE was first introduced in 2006 it changed the landscape for high performance SPICE simulation. During the last 14 years it has been used widely to verify advanced nanometer designs. Of course, since then the most advanced designs have progressed significantly, making verification even more difficult. Just… Read More
Semiconductor IP is one of the most talked about topics on SemiWiki. Always has been, always will be. Synopsys is also one of the most talked about topics on SemiWiki and IP is a very big part of that, absolutely.
After reading Eric Esteve’s latest IP Report I Googled around and found some interesting things. First, I found a Brief History… Read More
For those who design advanced and complex SoCs, the term “off-the-shelf IP” can be elusive. While this approach works for a wide range of IP titles, the pressure for maximum performance or minimum power can lead to custom-tailoring requirements for the IP.
PLDA has seen these requirements for the class of complex, high-performance… Read More
Many of us are now somewhat fluent in IoT-speak, though at times I have to wonder if I’m really up on the latest terminology. Between edge and extreme edge, fog and cloud, not to mention emerging hierarchies in radio access networks – how this all plays out is going to be an interesting game to watch. Ron Lowman, DesignWare IP Product… Read More
Semiconductor technology advances have a way of rewriting the rule book. As process geometries shrink, subtle effects graduate to mainstream problems. Performance curves can become inverted. And no matter what else occurs, low power demands are constantly reducing voltage and design margins along with it. Sometimes these… Read More
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