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Design Technology Co-Optimization (DTCO) for sub-5nm Process Nodes

Design Technology Co-Optimization (DTCO) for sub-5nm Process Nodes
by Tom Dillinger on 06-23-2020 at 6:00 am

scaled metal resistance

Summary
Design Technology Co-Optimization (DTCO) analysis was pursued for library cell PPA estimates for gate-all-around (GAA) devices and new metallurgy options.  The cell design and process recommendations are a bit surprising.

Introduction
During the “golden years” of silicon technology evolution that applied Dennard… Read More


CEO Interview: Deepak Kumar Tala of SmartDV

CEO Interview: Deepak Kumar Tala of SmartDV
by Daniel Nenni on 06-22-2020 at 10:00 am

SmartDV CEO Interview 2020

SMARTDV is one of the biggest small EDA companies in the industry today in regards to products, customers and number of licenses in use, absolutely. They have a portfolio of more than 600 Design & Verification Solutions, everything from Design & Verification IP to Formal Verification IP, Post-Silicon Verification IP… Read More


Seeing is Believing, the Benefits of Delta’s Low-Resolution Vision Chip

Seeing is Believing, the Benefits of Delta’s Low-Resolution Vision Chip
by Mike Gianfagna on 06-22-2020 at 6:00 am

Screen Shot 2020 06 15 at 10.16.13 AM

Presto Engineering recently held a webinar discussing vision chip technology – what a vision chip is, what are the applications and how can you optimize its use.  Samer Ismail, a design engineer at Presto Engineering with deep domain expertise in vision chip technology was the presenter.  Samer takes you on a very informative … Read More


Embedded MRAM for High-Performance Applications

Embedded MRAM for High-Performance Applications
by Tom Dillinger on 06-21-2020 at 10:00 am

embedded memory requirements

Summary
A novel spin-transfer torque magnetoresistive memory (STT-MRAM) IP offering provides an attractive alternative for demanding high-performance embedded applications.

Introduction
There is a strong need for embedded non-volatile memory IP across a wide range of applications, as depicted in the figure below.

The… Read More


Uber: Pariah to Paragon

Uber: Pariah to Paragon
by Roger C. Lanctot on 06-21-2020 at 8:00 am

Uber Pariah to Paragon

For years, the lords of Lyft and Uber have declaimed their intention to vanquish car ownership and displace public transportation. It really was as simple and as blunt as that. For sure there would be collateral damage including rental car companies and taxi operators and millions of under-compensated drivers – but the bottom

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DVCon 2020 Virtual Follow-Up Conference!

DVCon 2020 Virtual Follow-Up Conference!
by Daniel Nenni on 06-19-2020 at 6:00 am

DVCon 2020 Logo SemiWiki

As most of you know DVCon 2020 was our first conference to be cut short by the Pandemic. SemiWiki bloggers Bernard Murphy, Mike Gianfagna, and I were there with full schedules but at the last minute it was called off. It really was an eerie feeling, the emptiness of it all.

The rest of our EDA live events followed suit and went virtual … Read More


Talking Sense with Moortec: Staying on the right side in worst case conditions – Power (Part 1)

Talking Sense with Moortec: Staying on the right side in worst case conditions – Power (Part 1)
by Tim Penhale-Jones on 06-18-2020 at 10:00 am

Tim Penhale Jones

In this first part of a 2-part blog series, we look at defining worst case conditions, focusing specifically on device power.

With great power, comes great responsibility…

With each new technology node especially FinFET, the dynamic conditions within a chip are changing and becoming more complex in terms of process speeds, thermal… Read More


The Moving Target Known as UPF

The Moving Target Known as UPF
by Tom Simon on 06-18-2020 at 10:00 am

UPF hierarchy

As if engineers did not have enough difficulty just getting everything right so that their designs are implemented functionally correct, the demands of lowering power consumption require changes that can affect functionality and verification. Techniques such as power gating, clock gating, mixed supply voltage, voltage … Read More


Cruise Controlling Its Destiny

Cruise Controlling Its Destiny
by Roger C. Lanctot on 06-18-2020 at 6:00 am

Cruise Controlling Its Destiny

The Information tells us that General Motors’ Cruise Automation self-driving car unit has acquired automotive radar maker Astyx. The move can be seen as a simple defensive move to preserve access to valuable radar technology along the path to realizing Cruise’s vision of a robotaxi infused future.

There are a variety

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Cadence Adds “Always On” to vManager Verification Management with Distributed and Cloud Access

Cadence Adds “Always On” to vManager Verification Management with Distributed and Cloud Access
by Mike Gianfagna on 06-17-2020 at 10:00 am

Screen Shot 2020 06 15 at 11.32.15 AM

Cadence vManager™ Verification Management provides what the company describes as metric-driven signoff. Anyone who has been through the tapeout process for a complex SoC knows the perils of verification sign-off. How much of the chip has been verified?  What’s left to do? Will all be ready when the tapeout deadline arrives? … Read More