In this interview we talk with Sam Mahalingam, chief technology officer at Altair, about gaining a competitive edge with software that’s built to handle high-throughput workloads like chip design and electronic design automation (EDA). Altair is a global technology company providing solutions in product development, high-performance… Read More





Optimizing Chiplet-to-Chiplet Communications
Summary
The growing significance of ultra-short reach (USR) interfaces on 2.5D packaging technology has led to a variety of electrical definitions and circuit implementations. TSMC recently presented the approach adopted by their IP development team, for a parallel-bus, clock-forwarded USR interface to optimize power/performance/area… Read More
Intel Designs Chips to Protect from ROP Attacks
Intel comes late to the game but will be delivering an embedded defense for Return Oriented Programming (ROP) types of cyber hacks. I first blogged about this back in Sept of 2016. Yes, almost four years have passed and I had hoped it would see the light of day much earlier.
The feature, to debut in the Tiger Lake microarchitecture… Read More
The Stochastic Impact of Defocus in EUV Lithography
The stochastic nature of imaging has received a great deal of attention in the area of EUV lithography. The density of EUV photons reaching the wafer is low enough [1] that the natural variation in the number of photons arriving at a given location can give rise to a relatively large standard deviation.
In recent studies [2,3], it … Read More
CEO Interview: John O’Donnel of yieldHUB
Let me introduce John O’Donnell, CEO of yieldHUB. After earning a degree in microelectronics John spent 18 years at Analog Devices before founding yieldHUB in 2005. If anybody knows yield it is Analog Devices having shipped billions upon billions of chips, absolutely.
SemiWiki will be digging deeper into the technology… Read More
Multi-Vt Device Offerings for Advanced Process Nodes
Summary
As a result of extensive focus on the development of workfunction metal (WFM) deposition, lithography, and removal, both FinFET and gate-all-around (GAA) devices will offer a wide range of Vt levels for advanced process nodes below 7nm.
Introduction
Cell library and IP designers rely on the availability of nFET and pFET… Read More
Nobody Ever Lost Their Job for Spending too Much on Hardware Verification, Did They?
A paper was published last month on the Acuerdo Consultancy Services website authored by Joe Convey of Acuerdo and Bryan Dickman of Valytic Consulting. Joe and Bryan spent combined decades in the Semi and EDA World which means they have a great understanding of hardware bugs first hand, absolutely.
Here is a quick summary… Read More
Key Semiconductor Conferences go Virtual
This last week the 2020 Symposia on VLSI Technology and Circuits (VLSI Conference) was held as a virtual conference for the first time and it was announced today (June 24th) that this year’s IEDM conference will also be held as a virtual conference.
“The IEDM Executive Committee has decided that in the interest of prioritizing the… Read More
Apple’s Silicon Switch Changes Game & Balance
Will/should others follow?
TSMC vs Intel impact?
Moving Apple’s supply chain further overseas
Apples move to self served silicon was no surprise…..
It has been speculated for years and we have talked about it many times. It makes more sense for Apple to have silicon, custom designed for their applications and products… Read More
Why Go Custom in AI Accelerators, Revisited
I believe I asked this question a year or two ago and answered it for the absolute bleeding edge of datacenter performance – Google TPU and the like. Those hyperscalars (Google, Amazon, Microsoft, Baidu, Alibaba, etc) who want to do on-the-fly recognition in pictures so they can tag friends in photos, do almost real-time machine… Read More
Weebit Nano Moves into the Mainstream with Customer Adoption