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S2C Announces 300 Million Gate Prototyping System with Intel® Stratix® 10 GX 10M FPGAs

S2C Announces 300 Million Gate Prototyping System with Intel® Stratix® 10 GX 10M FPGAs
by Daniel Nenni on 09-08-2020 at 10:00 am

10M0904

In 2016 SemiWiki published a book “Prototypical: The Emergence of FPGA-Based Prototyping for SoC Design”. Today we are writing Prototypical II since a LOT of prototyping innovation has happened in the last four years, absolutely.

For example:

Quad 10M Prodigy™ Logic System extends the capacity leadership to simplifyRead More


Combo Wireless. I Want it All, I Want it Now

Combo Wireless. I Want it All, I Want it Now
by Bernard Murphy on 09-08-2020 at 6:00 am

Mixed wireless

When we think of wireless it is natural to wonder “which one – cellular, Wi-Fi, BLE?” Our phones support everything but those are pricey devices. What if we wanted the same combo wireless option in a low-cost IoT device, maybe something that only need to send a small amount of data periodically? Logistics applications are a good example.… Read More


Dolphin Design – Delivering High-Performance Audio Processing with TSMC’s 22ULL Process

Dolphin Design – Delivering High-Performance Audio Processing with TSMC’s 22ULL Process
by Mike Gianfagna on 09-07-2020 at 10:00 am

Dolphin Design – Delivering High Performance Audio Processing with TSMCs 22ULL Process

TSMC held their very popular Open Innovation Platform event (OIP) on August 25. The event was virtual of course and was packed with great presentations from TSMC’s vast ecosystem. One very interesting and relevant presentation was from Dolphin Design, discussing the delivery of high-performance audio processing using TSMC’s… Read More


Highlights of the TSMC Technology Symposium – Part 2

Highlights of the TSMC Technology Symposium – Part 2
by Tom Dillinger on 09-07-2020 at 8:00 am

3D Fabric

Recently, TSMC held their 26th annual Technology Symposium, which was conducted virtually for the first time.  This article is the second of three that attempts to summarize the highlights of the presentations.  This article focuses on the TSMC advanced packaging technology roadmap, as described by Doug Yu, VP, R&D.

KeyRead More


In-Chip Monitoring Helps Manage Data Center Power

In-Chip Monitoring Helps Manage Data Center Power
by Tom Simon on 09-07-2020 at 6:00 am

in-chip sensing

Designers spend plenty of time analyzing the effects of process, voltage and temperature. But everyone knows it’s not enough to simply stop there. Operating environments are tough and have lots of limitations, especially when it comes to power consumption and thermal issues. Thermal protection and even over-voltage protections… Read More


Inside the HP Nanoprocessor: A High-speed Processor That Can’t Even Add

Inside the HP Nanoprocessor: A High-speed Processor That Can’t Even Add
by Ken Shirriff on 09-06-2020 at 10:00 am

Inside the HP Nanoprocessor

The Nanoprocessor is a mostly-forgotten processor developed by Hewlett-Packard in 19741 as a microcontroller2 for their products. Strangely, this processor couldn’t even add or subtract,3 probably why it was called a nanoprocessor and not a microprocessor. Despite this limitation, the Nanoprocessor powered numerous… Read More


PCI Express in Depth – Transaction Layer

PCI Express in Depth – Transaction Layer
by Luigi Filho on 09-06-2020 at 7:00 am

PCI Express in Depth Transaction Layer

In the last article i write about the Data Link Layer, in this article i’ll write about the Transaction Layer.

This layer’s primary responsibility is to create PCI Express request and completion transactions. It has both transmit functions for outgoing transactions, and receive functions for incoming transactions.… Read More


PCI Express in Depth – Data Link Layer

PCI Express in Depth – Data Link Layer
by Luigi Filho on 09-06-2020 at 6:00 am

PCI Express in Depth Data Link Layer

In the last article, i wrote about the physical layer, now let’s take a look in the next layer the data link layer.

The Data Link Layer serves as the “gatekeeper” for each individual link within a PCI Express system. It ensures that the data being sent back and forth across the link is correct and received in the same order it

Read More

Alchip at TSMC OIP – Reticle Size Design and Chiplet Capabilities

Alchip at TSMC OIP – Reticle Size Design and Chiplet Capabilities
by Mike Gianfagna on 09-04-2020 at 10:00 am

Alchip machine learning design

This is another installment covering TSMC’s very popular Open Innovation Platform event (OIP), held on August 25. This event presents a diverse and high-impact series of presentations describing how TSMC’s vast ecosystem collaborates with each other and with TSMC.  This presentation is from Alchip, presented by James Huang,… Read More


Highlights of the TSMC Technology Symposium – Part 1

Highlights of the TSMC Technology Symposium – Part 1
by Tom Dillinger on 09-04-2020 at 8:00 am

A72 core high density

Recently, TSMC held their 26th annual Technology Symposium, which was conducted virtually for the first time.  This article is the first of three that attempts to summarize the highlights of the presentations.

This article focuses on the TSMC process technology roadmap, as described by the following executives:

  • Y.J. Mii, SVP,
Read More