Curbing Soaring Power Demand Through Foundation IPPower has become a very hot (ha-ha) topic.…Read More
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2026 Outlook with Cristian Amitroaie, Founder and CEO of AMIQ EDACristian Amitroaie is the Founder and CEO of…Read More
Pushing the Packed SIMD Extension Over the Line: An Update on the Progress of Key RISC-V ExtensionThe rapid growth of signal processing workloads in…Read More
Verification Challenge
As chip design complexity continues to grow astronomically with hardware accelerators running riot with the traditional hardware comprising CPUs, GPUs, networking and video and vision hardware, concurrency, control and coherency will dominate the landscape of verification complexity for safe … Read More
Dan is joined by Frank Schirrmeister, senior group director of solutions marketing at Cadence Design Systems, Frank has extensive experience in complex system design from his work at companies such as Cadence, Synopsys, Imperas and ChipVision. He has also advised Vayavya Labs and CriticalBlue.
Dan and Frank discuss the many… Read More
We were all pleasantly surprised when TSMC increased 2021 Capex to a record $28 billion. To me this validated the talk inside the ecosystem that Intel would be coming to TSMC at 3nm. We were again surprised when TSMC announced a $100B investment over the next three years which belittled Intel’s announcement that they would spend … Read More
In early April, Gabriele Saucier kicked off Design & Reuse’s IPSoC Silicon Valley 2021 Conference. IPSoC conference as the name suggests is dedicated to semiconductor intellectual property (IP) and IP-based electronic systems. There were a number of excellent presentations at the conference. The presentations had been… Read More
There is an important difference between low power and low energy in SOC design. Low power focuses on instantaneous power consumption. This is frequently done to deal with cooling and heat dissipation issues. Of course, it serves as a prerequisite for low energy design, which seeks to reduce overall power consumption over time.… Read More
We have come a long way from the days of limited and manageable characterization databases with fewer views and smaller library sizes. The technologies we are headed towards pushing characterization to its limits with special modeling for variation, aging and reliability all on a single process, voltage and temperature (PVT).… Read More
Semiconductors have been central to the information revolution which is reshaping society. The modern world would not exist without this critical resource. Further, semiconductors are central to many sustainability solutions such as the enablement of smart infrastructure, electrification, and virtualization. One of… Read More
Siemens EDA’s Veloce emulation products are long-established and worthy contenders in any emulation smack-down. But there was always a hole in the complete acceleration story. Where was the FPGA prototyper? Current practice requires emulation for fast simulation with hardware debug, plus prototyping for faster simulation… Read More
Design verification (DV) is still one of the biggest challenges in the ASIC based product world. In last two decades, we have seen many changes in terms of HVLs and methodologies used for design verification. System Verilog is the most popular HVL these days and UVM is the most popular verification methodology.
Even after such an… Read More
Apologies for the slightly hyperbolic title of this post. Webster defines Juggernaut as “a massive inexorable force, campaign, movement, or object that crushes whatever is in its path.” Marvel Comic fans will recall the term also refers to a superhero nemesis. But I digress. The ESD Alliance recently announced its Q4 2020 Electronic… Read More
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AI Bubble?