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What does a Deep Learning Chip Look Like

What does a Deep Learning Chip Look Like
by Daniel Nenni on 02-16-2018 at 12:00 pm

There’s been a lot of discussion of late about deep learning technology and its impact on many markets and products. A lot of the technology under discussion is basically hardware implementations of neural networks, a concept that’s been around for a while.

What’s new is the compute power that advanced semiconductor technology… Read More


Why It’s A Good Idea to Embed PVT Monitoring IP in SoCs

Why It’s A Good Idea to Embed PVT Monitoring IP in SoCs
by Daniel Payne on 02-16-2018 at 7:00 am

At Intel back in the late 1970’s we wanted to know what process corner each DRAM chip and wafer was trending at so we included a handful of test transistors in the scribe lines between the active die. Having test transistors meant that we could do a quick electrical test at wafer probe time to measure the P and N channel transistor… Read More


SPI Inspires a New Generation of SOC Designs

SPI Inspires a New Generation of SOC Designs
by admin on 02-15-2018 at 12:00 pm

When I started dabbling in hardware again for fun using Arduinos about five years ago, it had been a long time since I had played with microprocessor chips. The epiphany for me was seeing how easy it was to load programs onto the onboard flash on something like an Atmel AVR using the SPI interface. My previous experience decades early… Read More


Webinar: Bottlenecks be Gone – Automated Performance Verification with Synopsys

Webinar: Bottlenecks be Gone – Automated Performance Verification with Synopsys
by Bernard Murphy on 02-14-2018 at 10:00 pm

Performance verification is among the most challenging of objectives in any SoC verification plan. It’s difficult to start effectively until quite late in the development cycle, at which point you don’t have a lot of time left to develop extensive performance-oriented testbenches. So many teams adapt functional tests to this… Read More


Data Security – Why It Might Matter to Design and EDA

Data Security – Why It Might Matter to Design and EDA
by Alex Tan on 02-14-2018 at 12:00 pm


According to the Economist,
The world’s most valuable resource is no longer oil, but data”.
Is this the case?Data is the by-product ofmany aspects of recent technology dynamics and is becoming the currency of today’s digital economy. All categories in Gartner’s Top10 Strategic Technology Trends for 2018 (FigureRead More


FPGA Prototyping Exposed

FPGA Prototyping Exposed
by Daniel Nenni on 02-14-2018 at 7:00 am

In case you missed it, the FPGA Prototyping for SoCs webinar happened last week. I did the opening ceremonies which I will run through briefly here or you can go straight to the replay HERE.


FPGA prototyping is one of the fastest growing market segments we track on SemiWiki which brings us to the topic at hand: FPGA Prototyping for SoCs… Read More


Unexpected Help for Simulation from Machine Learning

Unexpected Help for Simulation from Machine Learning
by Tom Simon on 02-13-2018 at 12:00 pm

I attend a lot of events on machine learning and write about it regularly. However, I learned some exciting new information about machine learning in a very surprising place recently. Every year for the last few years I have attended the HSPICE SIG dinner hosted by Synopsys in Santa Clara. This event starts with a vendor fair featuring… Read More


More Than Your Average IP Development Kit

More Than Your Average IP Development Kit
by Bernard Murphy on 02-13-2018 at 7:00 am

When I think of an IP development kit, I imagine software plus a hardware model I can run on a prototyper or, closer to the kits offered by semi companies, software plus a board hosting an FPGA implementation of the IP along with DDR memory, flash and a variety of interfaces. These approaches work well for IP providers because hardware… Read More


IEDM 2017 – Leti Gate-All-Around Stacked-Nanowires

IEDM 2017 – Leti Gate-All-Around Stacked-Nanowires
by Scotten Jones on 02-12-2018 at 12:00 pm

At IEDM in December I had a chance to interview Thomas Ernst about the paper “Performance and Design Considerations for Gate-All-around Stacked-NanoWires FETs” by Leti and STMicroelectonics.

Leti published the first stacked nanowire in 2006, it was very new then, now stacked nanowire/nanosheets are starting… Read More


Qualcomm Continues to Mislead its Own Stockholders

Qualcomm Continues to Mislead its Own Stockholders
by Daniel Nenni on 02-12-2018 at 7:00 am

The war of words continues between Broadcom and Qualcomm and the stock analysts still seem to be split on the merger. Please note that Broadcom is proposing to merge with Qualcomm instead of a tender offer which is what Qualcomm has proposed for the acquisition on NXP. Same result but two very different approaches. Another interesting… Read More