Lead Design Engineer

Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality.  Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications including consumer, hyperscale computing, 5G communications, automotive, aerospace industrial and health.

The Cadence Advantage

• The opportunity to work on cutting-edge technology in an environment that encourages you to be creative, innovative, and to make an impact.
• Cadence’s employee-friendly policies focus on the physical and mental well-being of employees, career development, providing opportunities for learning, and celebrating success in recognition of specific needs of the employees.
• The unique “One Cadence – One Team” culture promotes collaboration within and across teams to ensure customer success
• Multiple avenues of learning and development available for employees to explore as per their specific requirement and interests
• You get to work with a diverse team of passionate, dedicated, and talented individuals who go above and beyond for our customers, our communities, and each other—every day.

Job Summary:

Drives development of products and technologies and has material responsibility for the success of that product/technology.

Job responsibilities:

The responsibility entails performing pre silicon Physical Layer Electrical Validation infrastructure development as well as post silicon validation primarily on Cadence’s High Speed SERDES Test chips, ie,  activities involving (but not limited to) designing the hardware and software architecture required to test the test chips (be it the test PCBs, controlling FPGA platforms, Labview/python automation for controlling the HW etc), defining test plans for rigorously testing the compliance of the Test chips to the Physical Layer Electrical specifications, implementing these tests as planned, generating high quality test reports based on the test results etc.

Looking for 2-5 years of experience in Post-Silicon Validation related or hardware analog system level circuit design related activities

Experience and Technical Skills required (edit as per the requirement):

• Candidates are certainly expected to be passionate about analog and digital electronic circuit design aspects as well as signal processing related aspects.
• Experience in using lab equipment such as Oscilloscopes, Network Analyzer, Bit Error Rate Tester (BERT) etc is a significant added plus.
• Familiarity with concepts of high speed serial communication – Transmission lines, clock and data recovery
• Familiarity with board schematic/layout design and lab bring-up is an added plus
• Familiarity with Verilog/VHDL RTL coding, RTL design for FPGA, Labview, python, C/C++, TCL is an added plus