Layout Design, Sr Engineer

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are:

An experienced and passionate Layout Design Sr Engineer with a strong background in Analog and Mixed Signal Circuit Layout. You possess a deep understanding of semiconductor device physics and have hands-on experience in EDA tools for custom mixed signal layout flows. Your expertise in CMOS and FINFET technologies, coupled with your knowledge of CMOS fabrication technology, equips you to handle deep sub-micron effects and their impact on layout. You are self-directed, detail-oriented, and have excellent problem-solving and communication skills. Your enthusiasm for learning and exploring new layout techniques drives you to innovate and excel in your role.

What You’ll Be Doing:

• Design and development of transistor-level analog and mixed signal layout.
• Creating device/block level floorplans, performing placement, routing, and physical verification.
• Troubleshooting physical verification issues to achieve clean and desired results.
• Creating and reviewing layout documents to ensure they meet quality standards and are delivered on time.
• Collaborating with cross-functional teams to optimize the layout design process.
• Staying updated with the latest industry trends and advancements in layout design techniques.

The Impact You Will Have:

• Contributing to the development of high-performance silicon chips.
• Ensuring the reliability and accuracy of analog and mixed signal layouts.
• Enhancing the efficiency of the layout design process.
• Supporting the delivery of high-quality products that meet industry standards.
• Facilitating innovation and continuous improvement in layout design techniques.
• Helping Synopsys maintain its leadership position in the semiconductor industry.

What You’ll Need:

• Bachelor’s or master’s degree in a relevant field.
• Minimum 3 years of experience in analog and mixed signal circuit layout.
• Experience with analog layout flow and EDA tools for custom mixed signal layout flows.
• In-depth knowledge of semiconductor device physics and analog circuits.
• Proficiency in CMOS and FINFET technologies and CMOS fabrication technology.
• Understanding of deep sub-micron effects and their impact on layout.
• Knowledge of EMIR, cross talk, shielding, and their impact on design.
• Experience in Tcl is a plus.

Who You Are:

• Self-directed and detail-oriented.
• Excellent problem-solving skills.
• Strong communication skills.
• Passionate about learning and exploring new layout techniques.

The Team You’ll Be A Part Of:

You will join a dynamic and innovative team focused on the design and development of high-performance silicon chips. The team collaborates closely with cross-functional teams to optimize the layout design process and ensure the delivery of high-quality products. Your contributions will be integral to the team’s success and Synopsys’ leadership in the semiconductor industry.

Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.

Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.