I do not include software as part of tape-out. Software can be a big swing depending on the application.Having worked for both ASIC and small/large system companies, I think you're a bit off the mark -- the biggest cost driver (apart from process) is design complexity, especially software.
The majority of SoCs I see are variations or have reusable blocks. Now with chiplets and multi die packaging tape out costs can be controlled even more. It really isn't as bad as it seems.
Unfortunately inflated costs are a big problem at the moment but as demand meets supply once again that ship will right itself. 2023 should bring back some normalcy to the semiconductor industry so I see smooth sailing on the horizon, absolutely.