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IC Insights has released its Global Wafer Capacity 2016-2020 report that provides in-depth detail and analysis of IC industry capacity by wafer size, by process geometry, by region, and by product type.
The new report provides a ranking of the industry’s 25 largest IC manufacturers in terms of installed capacity as of December 2015. The top 10 capacity leaders are shown in the below figure. Among the world’s top 10 capacity leaders in 2015 were four companies headquartered in North America, two companies based in South Korea and in Taiwan, and one company each from Europe and Japan. The list includes the world’s four largest memory suppliers, three largest foundries, the largest microprocessor supplier, and Texas Instruments and ST—the two biggest suppliers of analog ICs.
The only change from the 2014 ranking is the swap at the 6th and 7th place, between Intel and GF.
Intel and ST are the only 2 IC manufacturers with a negative Yr/Yr ratio, while GF, TSMC and Hynix registered a solid double digit jump.
Can anyone tell me if these numbers are wholly credible? If so, I must conclude that Intel, which according to its own vast spin machine, supported by a large majority of analysts and technology bloggers, has "the best in class" manufacturing facilities, has less than 38% of the wafer capacity of TSMC despite materially greater Capex over the last 4/5 years.
I have been looking at the two companies Capex and trying to guess their relative wafer capacity for quite some time. Usually I get slapped down by Scott Jones, who I accept knows far more of these things than I. IC Insights, however, has now given figures that purport to be authorative. Are they? They fit the fact that TSMC has built three "Gigafabs" when Intel mothballed a sizeable fab in Arizona and bangs on about "copy exact" to keep its small fabs going in Ireland and Israel.
I would definitely say that those numbers are fairly accurate.
The figures are normalized to a 200mm wafer size.
It looks like the -1% for Intel is mainly caused by the current chinese FAB68 conversion from chipsets to memories.
Agreed, I always wonder where they get these numbers. Not directly from the companies listed, so where?
At the ISS conference this week there were quite a few industry forecast presentations and some made me chuckle. One industry expert insisted it costs $10B to build a fab. Is that a logic or memory fab? Foundry or IDM? Is the fab in the US or China? How many wafers per month? It really is ridiculous to make a broad statement like that as a so called expert. Remember, TSMC is building a leading edge(16nm) fab in China for under $3B and I don't think they have spent more than $5B for one in Taiwan.
Here's who presented industry outlooks. I have all of the slides and pages of notes, let me know which ones you would be interested in my summarizing:
Brian,
The wafer capacity numbers appear to be reasonable, with no wool being pulled over anybody's eyes. The big caveat is that these are mixed capacity numbers, both in terms of process (logic, memory, analog, etc.) and node (14nm to 1micron). Intel looks quite good if you filter on leading edge (<28nm) and logic process only - that's all they are producing (OK, a little memory too via joint venture with Micron). Only 20-30% of TSMC's production is leading edge logic.
Brian,
The wafer capacity numbers appear to be reasonable, with no wool being pulled over anybody's eyes. The big caveat is that these are mixed capacity numbers, both in terms of process (logic, memory, analog, etc.) and node (14nm to 1micron). Intel looks quite good if you filter on leading edge (<28nm) and logic process only - that's all they are producing (OK, a little memory too via joint venture with Micron). Only 20-30% of TSMC's production is leading edge logic.
48% of TSMC's revenues in 2015 derived from 28nm and below, per the figures given by Lora Ho. Most if not all TSMC's capacity relates to logic. Thus even ignoring the nodes >28nm, which in economic terms is just absurd, TSMC has built significantly greater capacity with less Capex.
The fact is that Intel mothballed its new fab in Arizona and spent capex on "copy exact" to keep its outdated smaller plants in Ireland and Israel going. TSMC built three Gigafabs. Intel even bragged about the excellence of their copy processes!
According to Dan TSMC's Gigafabs ( defined as fabs with more that 100,000 WPM capacity) each cost about $5bn. It's new plant in China is anticipated to cost $3bn, with a capacity of 20,000 WPM. The difference in capex productivity on these figures is just staggering. Intel's Irish plant, I understand, has a capacity of less than 30,000.
Looks like a lot of wool to me. These are the kind of reasons I look for why TSMC's price to Apple for the A9 is about equal to Intel's average depreciation per unit of sales (based on Krsanich's figures given in 2014). Who is "best in class"?
Depreciation, the charge for capex, is almost certainly over 50% of the cost of manufacture. It is not possible to overestimate the seriousness of getting it wrong.
@Bryan,
I think Intel is less capital efficient in building it's leading edge fabs, but not quite as bad as you suggest. 28nm isn't really a leading edge node anymore. Per Lora, 24% of TSMC's Q4'15 revenues came from 20nm and 16nm, and 20% for the whole of 2015 and 9% for 2014. So roughly 1/3 of TSMC's capacity, or about 630K wafer equivalents is leading edge ready as we look into 2016, just shy of Intel's 714K. For roughly the same capex over the past few years, TSMC has been able to build equivalent leading edge capacity while also maintaining and refitting the 2/3 of their now-depreciated capacity at more mature nodes. Intel is pretty much cursed to stay at the expensive leading edge only by Moore's law, though they are learning how to do profitable fabless business through both the Infineon and Altera acquisitions.
A different way to look at the Intel vs. TSMC is via traditional financial metrics. Even though Intel has much higher gross margins than TSMC, TSMC gets a much better return on invested capital (ROIC), because their fabs have much longer profit producing tails once they are fully depreciated. Intel pretty much has to replace a fab by the time it is fully depreciated, especially with Intel stretching out their depreciation cycles starting in 2016.
Thanks for your comments. Neither Intel nor TSMC publish the numbers that I am really interested in, which would enable me to understand, for example, what it costs to manufacture the Skylake i3/i5 v the A9 and the forthcoming A10. All the indications that I can find, however, suggest that Intel's costs are off the scale.
Whether or not 28nm is "leading edge" is actually of little interest to me. There are many indications that some designers consider that its costs per transistor will not be improved upon, for which reason TSMC is predicting that it will last a long time. TSMC is going down the nodes because Apple wants it and others, such as QCOM and Mediatek, are not prepared to stay behind. They want more powerful SoCs, with more functions. Intel can only respond by producing CPUs which I believe will shortly be matched if not outclassed by the SoCs and undoubtedly cost a great deal more. I have been trying to understand why.
Given very little information, and with the knowledge that Intel spends about $2bn on advertising and spin, I draw what conclusions I can from the 10-Ks and 20-Fs. These tell me that depreciation is over 50% of costs of manufacture charged against GM. Intel just does not have the volumes necessary to get their unit costs down to a number below one that is several orders of magnitude greater than TSMC. Without x86 monopoly pricing they are not competitive. Divide costs charged against GM by volumes and the figures are dreadful.
The problem IMO is not Moore's Law but the x86. It costs $400-500m and takes 2.5 years to produce an IC. ARM's ICs cost a fraction of those numbers. Hitherto they have kept in the game with "leadership" under Moore's Law, although they gave up on producing a competitive SoC when they abandoned Broxton. The idea that they can buy their way into mobile by dumping inferior product is just proven bad strategy. Without mobile their volumes depend on datacenters and a declining PC market, which as the SoCs improve will come under increasing pressure.
Maybe they will produce a Skylake SoC to compete with Ares and the A10/A11. I am not holding my breath. If they don't the question becomes when and how the SoCs will eat away the monopoly.
It's interesting. I too had an analysis of this report and blogged about it here.
What I see is the wafer capacity is based on overall consumption and naturally, memory suppliers are coming at the top followed by pure-play. While TSMC is second in terms of capacity, GF has largest year-year increase in capacity at 18%. The pure-play foundries cater to all kinds of wafers whereas Intel may be catering to their own world of logic, processors,...
However, it's Intel that's spending maximum dollars in R&D, ~22% of the total R&D expense by the overall semiconductor industry. Intel's R&D/Sales ratio is 24% as of 2015, rarely we see in other companies. Now how much Intel gains out of their R&D in this severe competition is to be seen.
