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I wish to introduce myself as Sendil. I have been working at Marvell's CPU team for the past 8 months verification engineer. My work has given me the opportunity to involve myself in a cutting-edge verification activities.
Besides my work, I wish to contribute to open source verification IP development/ EDA. It would be of great help if I could get suggestions/pointers on how/where to look for opportunities to contribute to VIP/ Verification EDA development.
Sendil,
First, I'd like to thank you for your community-mindedness.
I'd like to suggest that there is work that can be done to release IP-XACT models for the Opencores library, to the Opencores library.
Then, take the various open-source tools for IP-XACT and verify that the library works with them. It would save a lot of people using open-source if they had a set of IP-XACT models available.
I wish to introduce myself as Sendil. I have been working at Marvell's CPU team for the past 8 months verification engineer. My work has given me the opportunity to involve myself in a cutting-edge verification activities.
Besides my work, I wish to contribute to open source verification IP development/ EDA. It would be of great help if I could get suggestions/pointers on how/where to look for opportunities to contribute to VIP/ Verification EDA development.
One thing you can do is go to the standards committees (IEEE & Accelera) since Marvell is probably a paid up member and actually vote for support for things like power-management verification and sensible user-defined type schemes - and integration of Verilog-AMS into SystemVerilog. People like myself who are independent are no longer getting to contribute, and the development process is dominated by vendors.
I'd forgotten about IP-XACT, seems premature for it to have gone to the IEEE - development usually slows to a crawl when stuff goes there and people seem to do it for political reasons rather than technical.
