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Intel Corporation (INTC) CEO Pat Gelsinger Presents at JPMorgan 49th Annual Global Technology, Media and Communications Conference (Transcript)

Daniel Nenni

Admin
Staff member
Pat has certainly brought more transparency, which I do appreciate. He still seems to be struggling with the Intel specific terminology though:

"We've got past some of the stumbles at 10 and now 7, and the daily updates that we're getting on wafers coming out of fab, the full embrace of EUV, we're very confident that we have that back on track. In fact, right now, we're taping out the compute tile, the Meteor Lake compute tile, is finishing tape-in as we speak," Gelsinger said.

He meant taping-in, which, as I have found, is an IDM terminology dating back to RCA Microelectronics in the 1970s. Us fabless people call it taping-out because we don't do the prep work for mask shops etc...

"The -- well publicized 7 nanometer stumbling, that's back on track, even embrace the EUV and I've set out a yearly cadence of process improvements. Also, we've restored our Tick-Tock product and core cadence."

Intel invested a record amount in ASML for what we all thought would be early EUV access yet TSMC and Samsung had EUV in production first. Hopefully Pat will fix this. I do think Pat is a bit overly optimistic on Intel 7nm but I will give him the benefit of the doubt. The preliminary density numbers puts Intel 7nm between TSMC N5 and N3 but a year later than TSMC N3 for risk production. TSMC N5 started risk production in 2019.

TSMC 3nm Intel 7nm.jpg


"We do see that Q1 was approximately the bottom for the data center business and we're now on a solid path of recovery."

It was the bottom for Intel but the top for AMD? This competition just got interesting.

"And I do feel in that, hey, not everything -- years of bad decisions don't get fixed, because you got some new exciting CEO coming in."

Very true. Go Pat go!

" You don't want all of your eggs in the basket of a Taiwan fab, right, given some of the geopolitical situation, just supply chain resilience management post COVID, right. You want to look at your second supplier alternatives as well."

He is not wrong which is why Samsung is important and yes it would be great to have a third foundry alternative, absolutely. I was hoping for more color on the TSMC relationship but hopefully that will come sooner rather than later.

 
"well publicized 7 nanometer stumbling"

This is honestly the first time I've heard Intel admit to problems at 7nm. Up to now everything I heard (and never believed) was that 10nm had issues but 7nm was on track.

"Also, we've restored our Tick-Tock product and core cadence"

I've heard that one before

"And I do feel in that, hey, not everything -- years of bad decisions don't get fixed, because you got some new exciting CEO coming in."

Is this Pat's way of throwing past management under the bus?
 
How many EUV lithography machines does Intel need? Numbers out of ASML suggest minimal expenditure from North America at roughly 1/4 of Taiwan or S. Korea and a backlog of over 40 units. If they are using TSMC for 2023 high end chips where does that leave them from a timing perspective? With 31 units delivered in 2020 and a backlog of a years worth of machines when is intel expecting to ramp using 7nm if they can't get their hands on the units until 2022/23?
Also, Samsung is clearly not resting on its laurels. Over 4 billion in capex in S. Korea (1 EUV to S.K. Hynix but assuming rest to Samsung). Intel may be talking a big game with 20b in Capex this year but nearly 1/4 of that budget was spent by Samsung last year on lithography alone.
 
How many EUV lithography machines does Intel need? Numbers out of ASML suggest minimal expenditure from North America at roughly 1/4 of Taiwan or S. Korea and a backlog of over 40 units.

This is the big question. Do they have enough for full EUV production at 7nm? I honestly do not think so. Intel engaged TSMC at 3nm and may have reduced the number of EUV machines it needed under Bob Swan. Now that Pat is back with IDM 2.0 that seems to have changed. Unfortunately with ASML backlogged getting more EUV systems in quick order is not possible. That is the most likely story. I'm sure the truth will come out at some point in time. Maybe an analyst will ask Pat this question?
 
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