Array
(
    [content] => 
    [params] => Array
        (
            [0] => /forum/index.php?threads/giant-euv-masks.19069/
        )

    [addOns] => Array
        (
            [DL6/MLTP] => 13
            [Hampel/TimeZoneDebug] => 1000070
            [SV/ChangePostDate] => 2010200
            [SemiWiki/Newsletter] => 1000010
            [SemiWiki/WPMenu] => 1000010
            [SemiWiki/XPressExtend] => 1000010
            [ThemeHouse/XLink] => 1000970
            [ThemeHouse/XPress] => 1010570
            [XF] => 2021370
            [XFI] => 1050270
        )

    [wordpress] => /var/www/html
)

Giant EUV masks

Tanj

Well-known member
Really giant. I suppose the optics involved just scan the mask for longer, with the same slit.


Highlights of the mask industry workshop on 6"x12" mask format for EUVL
Frank E. Abboud, Vice President Technology Development ,Intel Corporation.

Our mask industry has been a driving force in enabling the extension of Moore’s law and supporting the wafer fab communities in whatever it takes to keep advancing the semiconductor industry. Time and time again, the mask industry came through with innovations and solutions that provide the wafer fabs with better and cheaper ways to produce high-end devices. Mask evolved from the early days of 1X printing and then 4x projection steppers to the crazy times with reticle enhancement techniques, phase shift masks, and off axis illumination that extended optical lithography beyond what anyone had ever imagined! Now we have the paradigm shift to EUV Lithography that was enabled by EUV masks. EUV mask making was no vacation for the mask makers. Everything had to change. Blanks, absorber material, writers, process equipment, and EUV wavelength inspection, and yes, a new pellicle that allows EUV to go through yet keep particles from falling onto the mask...
 
That is a really good (or bad) joke. The High NA EUV optical system with 26 mm x 16.5 mm wafer field size was designed to keep the 6" x 6" mask size. I'm sure ASML appreciates this request from Intel, to get back the 26 mm x 33 mm wafer field size.
 
Last edited:
I'm sure ASML appreciates this request from Intel, to get back the 26 mm x 33 mm wafer field size.
Apparently ASML was at the meeting. And it kind of makes sense since the only thing which really changes in the optics is translating the mask and target in sync for twice the length. On the target (wafer) movement that just puts it where it is today. On the mask side the transport becomes twice as long, but that is far from the most difficult thing they do in those machines.
 
Apparently ASML was at the meeting. And it kind of makes sense since the only thing which really changes in the optics is translating the mask and target in sync for twice the length. On the target (wafer) movement that just puts it where it is today. On the mask side the transport becomes twice as long, but that is far from the most difficult thing they do in those machines.
So apparently, having the half-field was more trouble than changing the mask size. A costly learning.
 
Back
Top