Exotic memories

[cliff]

Lots of talk about magnetic/resistive/etc RAM. Any prediction by you process engineers on what will be viable and yieldable on the logic finfet processes (16-12 preferred) in 2024? What attributes (speed, non volatile, etc)? Thanks

 

[nghanayem]

I think mram is already yielding on 22 fdx for gf, and you can buy it right now. According to their roadmap 12fdx should have it and be out, but GF hasn’t said anything about its roadmap or 12fdx since like 2019. I get the feeling they haven’t ramped it since they are still building an ecosystem with 22fdx. Intel has said 16 will have a full range of different memory devices. Rram I know nothing about.

 

[Paul2]

I think mram is already yielding on 22 fdx for gf, and you can buy it right now. According to their roadmap 12fdx should have it and be out, but GF hasn’t said anything about its roadmap or 12fdx since like 2019. I get the feeling they haven’t ramped it since they are still building an ecosystem with 22fdx. Intel has said 16 will have a full range of different memory devices. Rram I know nothing about.

SRAM, and EFLASH poor scaling at <40nm are main drivers, but it's not a 1-to-1 replacement.

STTMRAM dies from high current needed for any decent write speed.

Also, the showstopper is the weird probabilistic write property of MRAM.

Every time you write to an MRAM, there is a chance that it will not flip the cell, and this is inherent to quantum nature of underlying process.

To guarantee 10^18-10^20 error rate comparable to SRAM, you need to degrade MRAM endurance to 10^15, not much better than a good NOR flash.

 

[M. Y. Zuo]

SRAM, and EFLASH poor scaling at <40nm are main drivers, but it's not a 1-to-1 replacement.

STTMRAM dies from high current needed for any decent write speed.

Also, the showstopper is the weird probabilistic write property of MRAM.

Every time you write to an MRAM, there is a chance that it will not flip the cell, and this is inherent to quantum nature of underlying process.

To guarantee 10^18-10^20 error rate comparable to MRAM, you need to degrade MRAM endurance to 10^15, not much better than a good NOR flash.

So MRAM needs to be written to multiple times to guarantee a sufficient probability? Doesn't that imply a high write latency?

 

[Paul2]

So MRAM needs to be written to multiple times to guarantee a sufficient probability? Doesn't that imply a high write latency?

Yes, you either write slowly, or up the current.

In block storage, an LDPC/RS layer on top should solve this with flying colours

In SRAM replacement, not so much

I think we have a memory expert here who should know this way better than I do

 

[IanD]

I think mram is already yielding on 22 fdx for gf, and you can buy it right now. According to their roadmap 12fdx should have it and be out, but GF hasn’t said anything about its roadmap or 12fdx since like 2019. I get the feeling they haven’t ramped it since they are still building an ecosystem with 22fdx. Intel has said 16 will have a full range of different memory devices. Rram I know nothing about.

12FDX was always aimed to be a denser 22FDX, similar FETs but with a fully double-patterned metal stack. The problem is that it's then trying to compete with FinFET on the things that FinFET is good at (speed, density -- and available at all nodes down to 3nm...) without having the economies of scale or the IP ecosystem, and with no real advantage for the applications that people use 22FDX (or bigger FDSOI) mentioned on the FDSOI thread.

 

[jms_embedded]

I have no experience in this area but noticed recent news by Infineon/TSMC with using TSMC RRAM at 28nm.

Infineon, TSMC to introduce RRAM for automotive

Infineon is preparing to launch TSMC’s Resistive RAM (RRAM) memory in its next generation of automotive microcontrollers next year.

www.eenewseurope.com

Automotive market needs certain reliability guarantees... don't think they (or their chip suppliers) care which technology as long as the reliability can be met.

 

[Tanj]

To guarantee 10^18-10^20 error rate comparable to MRAM, you need to degrade MRAM endurance to 10^15, not much better than a good NOR flash.

MRAM has better endurance than 10^15? Any references for that?

MRAM references I have seen all have endurances that relegate them to IoT or other specialized niches with low endurance. And the read cycles are usually destructive requiring rewrite so they can add to endurance needs.

I would be delighted to be wrong, a ray of light on MRAM would be great.

 

[Fred Chen]

MRAM still has the issues of breakdown rate and read disturb rate, as indicated at IEDM 2022 (paper 10.7).

 

[Fred Chen]

Were it not for depolarization concerns, FeFETs would be much more attractive than MRAM.

 

[cliff]

So Fred, what would you bet on for 2024-2025 on the FinFET glutted processes (16-12), MRAM, ReRAM, FeFETs, other? You are the process guy.

 

[Tanj]

Were it not for depolarization concerns, FeFETs would be much more attractive than MRAM.

My understanding is that Hf/ZrO2 based ultra-thin films are looking good on depolarization:

Ferroelectric field effect transistors: Progress and perspective

Ferroelectric field effect transistors (FeFETs) have attracted attention as next-generation devices as they can serve as a synaptic device for neuromorphic implementation and a one-transistor (1T) ...

aip.scitation.org

Depolarization Field in FeFET Considering Minor Loop Operation and Charge Trapping

The ferroelectric field-effect transistor (FeFET) is a promising candidate for emerging memory. However, data retention loss is a key issue. One reason for the data retention loss is the depolarization field ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML"...

doi.org

Still, they are not shipping, so there is work pending. It would get my bet over MRAM though.

 

[Tanj]

IEDM session 10.7 shows an MRAM from Samsung with 1e14 endurance. Now we are in the zone for general purpose memory. The engineering looks expensive, many layers must be deposited, each column seems to have 10 elements.

 

[Paul2]

IEDM session 10.7 shows an MRAM from Samsung with 1e14 endurance. Now we are in the zone for general purpose memory. The engineering looks expensive, many layers must be deposited, each column seems to have 10 elements.

1e14 is where good nor eFlash would be, and i believe it's still tunable if you sacrifice error rate, and speed.

This must be STT-MRAM?

Toggle MRAM is what been flying to space, an it has endurance past what silicon itself has. One downside, power consumption, and size is huge.

SOT, and VCMA MRAMs are what would normally be counted as SRAM replacement, but so far no fab carries them in production yet.

 

[Fred Chen]

IEDM session 10.7 shows an MRAM from Samsung with 1e14 endurance. Now we are in the zone for general purpose memory. The engineering looks expensive, many layers must be deposited, each column seems to have 10 elements.

The concern was the short (breakdown) fail rate (not quantified, probably embarrassing) and read disturb rate (1e14) which means a disturb (destructive read) could happen within a year.

Followup note: breakdown count at 95%, already a bad sign!