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AMD Naples verus Skylake EP death match

lefty

Active member
You might have heard the news about Naples, AMD's return to the server market. (AMD Naples - Competition Re-Ignites as Zen Hits the Server Market
How AMD's Naples X86 Server Chip Stacks Up To Intel's Xeons)
The specs look good - Naples handily beats Intel's current Xeons on number of cores, bandwidth and amount of PCI-e channels.
However, Naples launches in Q2 and that's about the same time that Intel's Skylake EP will launch. Intel has given few official specs about Skylake EP. There will be AVX 512 extensions (a very important feature for some) and also it'll be on 14nm++ (really, it's Kabylake EP, more here: New Intel Xeon E5-2699A V4 and Skylake-EP Details 14nm PLUS)
Skylake EP will bridge the gap and maybe equal the performance of Naples, however AMD will be offering a lower price.
The Ryzen core has proved to perform very well, even against Kabylake. This site did a clock-er-clock and core-per-core comparison and the difference is actually quite small: Core by Core, MHz by MHz with AMD RYZEN 7 1800X vs Intel Core i7-7700K [English] | ZoLKoRn.CoM
In the server world things move slowly. Undoubtedly, OEMs will need time to incorporate Naples into their products and customers will need time to evaluate, but AMD is almost certain to gain market share in this extremely lucrative market.
 
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Why characterize this as a death-match? Intel, despite having fallen from their peak, is still extremely healthy. This is neither a competition of equals or a David vs. Goliath.

It is certainly good to see some competition if nothing more than to have some semblence of competitive pricing.
 
lefty: If i can add something... AVX512 is overhyped. Yes, it offers 2x better peak performance but actual uitilisation in x86 code is poor. You can see it in last Xeon Phi processor (which has some AVX512 subsets). And simmilar situation is with AVX2. Intel have 2x256b FMA units today, with peak performance of 32 Flops/cycle. On the other hand, AMD ZEN is only 2x128b MUL + 2x128b ADD which means only 16 Flops/cycle. Butt difference in real software is minimal. Actually, the only benchmark where Intel proffits from it, is Linpack (algebraic operations in rows of matrix. Matrix multiply has problems because of row-collum access conflicts).

Much better improvement is possibly that they are to increase L2 cache size from 256KB to 1MB. Butt again, more complex analysis is needed (bigger cache should mean bigger RC delays since Intel's process is less dense, also different structure will be needed...)

mgsporer: It is death-match, because if they force Intel to cut their prices then it should have devastating consequences. Intel is giant which needs at least one market where they are monopoly and AMD Naples can cause some problems in this strategy.
 
lefty: If i can add something... AVX512 is overhyped. Yes, it offers 2x better peak performance but actual uitilisation in x86 code is poor. You can see it in last Xeon Phi processor (which has some AVX512 subsets). And simmilar situation is with AVX2. Intel have 2x256b FMA units today, with peak performance of 32 Flops/cycle. On the other hand, AMD ZEN is only 2x128b MUL + 2x128b ADD which means only 16 Flops/cycle. Butt difference in real software is minimal. Actually, the only benchmark where Intel proffits from it, is Linpack (algebraic operations in rows of matrix. Matrix multiply has problems because of row-collum access conflicts).
Well, for most customers that's true, however for Google Cloud Platform it's extremely important, to the extent that they got early access to Skylake EP specifically so they could use this feature: Google Cloud Platform Blog: Google Cloud Platform is the first cloud provider to offer Intel Skylake
 
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