Intel Delays its Ohio fabs

[nghanayem]

It's not just Japan, Intel has been avoiding to have a fab in East Asia (except mainland China) altogether.

Mostly but not 100% true. Before becoming Micron Singapore, it was IMF Singapore. Micron buying out intel's share in IMF Utah and Singapore from under intel's feet was what caused Fab 68 to get converted to a NAND flash fab and the subsequent mass build out at the site. Besides E-Asia, I think the canned Texas fab was also a large labor pool that was missed. In light of the TI and Samsung expansions I think Texas is now too crowded for intel (or anyone else for that matter) at this point.

But Intel has no problem to build fabs in Ireland, Israel, and Germany.

Considering the East Asia's semiconductor supply chain, engineering talents, and manufacturing environment, I believe Intel made a big mistake and missed many great opportunities.

I agree with your premise. Although it is worth considering that before fab 42 in late 2020, intel didn't build a new fab for over a decade. And the last greenfield site intel built was Ireland back in like 1990. Back then the ROC, ROK, and Singapore had a far more nascent semiconductor industry. Israel was also kind of a no brainier since they already had a design section over there. Once you have these five sites you would be foolish to open more expensive greenfield locals rather than just expand the current sites to the limits permitted.

Now after Intel committed to build or expand more fabs in Germany, Ireland, Israel, Ohio, and Arizona, I don't think Intel can afford to build another fab in Japan or Singapore or in any other East Asian countries. No mater it's 40% subsidy or 50% subsidy from the local government.

As for Ohio and Germany, I think your argument holds more weight. I suspect that Ohio's location might be better then you suspect though. Ohio has access to abundant water and close proximity to the cornucopia of Midwestern engineering schools. My heavily biased opinion (as I grew up in the Chicago land area and went to school at Iowa State) is that there really isn't any other area in the US with such a high quantity of quality engineering schools. Something I also noticed a bit when I was looking for jobs out of college was alot of Ohio job listings with the description saying that you would work at D1 or Ocotillo, I assume these long term seed assignments would be harder (both for intel and the people who would be leaving their homes) to do if the applicants had to come from abroad. Being in a country where English is the primary language also definitely makes cross site communication easier. Germany seems like a harder choice to justify. The only thing I can think of is that they don't have to compete with as many fabs as they would if they built in say TW or Texas. Of course like in the US the greater population of engineers will to some degree be counteracted by having to compete with the Germany's many other industries (whereas someone like TSMC only needs to compete with their suppliers, fellow fab operators, and TW's electronics industry).

 

[hist78]

Japan is an interesting study. If the Japan Government says buy Japanese they will. Unlike the US., Korea is like that as well. Just about everything in Korea is Samsung, even tooth brushes! Not kidding.

Do you have any guesses about why Intel never built a fab in East Asia (except mainland China)?

 

[Michael Domnitei]

Intel had enough Fab capacity for many years but they were not used at full capacity. The Ohio plant is a political game since they don't need more fabs but make use of what they already have and we know that their foundry doesn't produce much but only promises. Besides, what in the world is Intel thinking of building in Ohio which has no history in semiconductor industry? Where are they going to find qualified people to work there? This is another management screw-up which Intel is good at for many years now.

 

[MKWVentures]

Intel didnt need any more fabs 2 years ago and still doesn't need any more fabs. They won't need Ohio in 2026. I just told you this. Intel will tell you this in mid 2025.

 

[MKWVentures]

Do you have any guesses about why Intel never built a fab in East Asia (except mainland China)?

High level: Asian fab are not that much cheaper unless you get incentives. Japan, Taiwan, Singapore can be more expensive. Intel like to have its fab in the US since there are already sites and partnerships with equipment vendors.

Intel needs to be in EU Ireland for trade reasons. and they get huge tax incentives. Israel has always been a Intel priority, they execute extremely well and they have incentives, educated workforce, etc.

When you need to make a purely financial decision the incentives from China were impossible to ignore (the China Fab was not a memory fab when it was started).

Incentives are the number one factor in all fab decision. IF the US gives incentives, then fabs will be built here. If not, they will be built elsewhere.

I have a blog coming on how the Chips act is working today. It is both the best program and the worst program at the same time. Luckily, Semiconductor companies are smarter than the government so it will work out for them.

 

[blueone]

Lastly I would like to hear an actual chip designer weigh in on this, but I am skeptical of how much information a chip designer can gain from looking at someone else's mask set. There is nothing you couldn't learn from the mask set that you couldn't learn from cutting open the realized product. And without the context of it working and what the original design's intent was I don't know if you can really draw a whole ton from seeing the mask set pre launch.

Given how many layers a typical complex chip has, I'd be surprised if one could discern anything about a design from examining the mask set. Cutting open a chip package and taking some x-rays can tell you something, but I'm not sure how important that is anymore, now that the big chip designers publish diagrams of the layouts of their chips and even chiplets. Long ago you could tell if a designer was using an MCM without telling anyone, and with an x-ray you could pick out a gate-array from custom silicon, but for really interesting new chips I can't believe this stuff is worth the effort.

I've always been skeptical of the notion that a fab could steal design secrets for logic designs. Maybe for memory.

 

[Tanj]

I can't fathom why they would be scared of "IP theft from IFS".

Indeed all IFS relationships are founded upon respecting IP. Intel can contribute significant IP to an IFS project, beyond what you buy from the EDA and 3rd party IP, all of which is rolled into the chips. As custom chips become more pervasive Intel is probably looking at how to ramp up licensing IP blocks, not just selling whole CPUs.

 

[nghanayem]

Maybe for memory.

I never thought of that; interesting thought. My understanding is that memory IC designs are highly dependent on the capabilities and location (ie traditional, CuA, hybrid bonded, etc) of the periphery transistors, so getting the full design might still be useless if your CMOS is even the slightest bit less capable or otherwise architected in a different way. Although maybe you can at least inspire your own designers assuming memory IC design isn't a solved design space?

 

[blueone]

I never thought of that; interesting thought. My understanding is that memory IC designs are highly dependent on the capabilities and location (ie traditional, CuA, hybrid bonded, etc) of the periphery transistors, so getting the full design might still be useless if your CMOS is even the slightest bit less capable or otherwise architected in a different way. Although maybe you can at least inspire your own designers assuming memory IC design isn't a solved design space?

I was thinking about stuff like embedded DRAM (I remember reading about a new capacitor-less design for embedded DRAM a couple of years ago), or perhaps SRAMs, but I'm reaching here.

 

[hskuo]

One interesting QUESTION from TSMC AZ Director.

 

[TBiggs]

One interesting QUESTION from TSMC AZ Director.
View attachment 1647

All schedules regardless of location, is based on necessity!!! If the customer requires and the technology is ready nothing money can’t buy! Buy people with the right skills to move, buy people to work more hours. The projects in US are all political and demand has evaporated so easy to delay the project and save money, duh!

 

[kopper]

All schedules regardless of location, is based on necessity!!! If the customer requires and the technology is ready nothing money can’t buy! Buy people with the right skills to move, buy people to work more hours. The projects in US are all political and demand has evaporated so easy to delay the project and save money, duh!

That is hardly true in this example. TSMC's schedule in Arizona was horribly informed from day one, i.e., the expectation that utility power would be ready in 1 year. They operated with their home-field mindset and failed to investigate the realities of constructing a new high-power delivery substation by the utility. Water will be the next problem as the high-capacity connections are being completed (clean and waste). The public statements made regarding the causes of the delay in Arizona contain nearly no truth. Especially the parts about skilled labor... yes, we have a trade labor shortage, across the entire country, but the local workforce had just completed tool install in Fab42 a couple of years prior, and the bulk of that experience had migrated up to TSMC. The real problem here is deeper than that, and when I personally shared it with the factory director, he was already aware of and acknowledged both the problem and the challenge of the required changes.

 

[kopper]

I agree with your premise. Although it is worth considering that before fab 42 in late 2020, intel didn't build a new fab for over a decade. And the last greenfield site intel built was Ireland back in like 1990.

A little refinement on the history - Ireland's Leixlip campus is a few years older than Kiryat Gat in Isreal. The first started with a twin to Fab9 in New Mexico, and the second started with the modified copy of D1B (also seen in Leixlip). The Arizona Ocotillo campus is also newer than Leixlip with Fab12, also a modified D1B copy (also seen in New Mexico). That fab design has the most instances - Ronler in Oregon, New Mexico's F11, Arizona Ocotillo, Leixlip, & Kiryat Gat.

 

[Daniel Nenni]

Given how many layers a typical complex chip has, I'd be surprised if one could discern anything about a design from examining the mask set. Cutting open a chip package and taking some x-rays can tell you something, but I'm not sure how important that is anymore, now that the big chip designers publish diagrams of the layouts of their chips and even chiplets. Long ago you could tell if a designer was using an MCM without telling anyone, and with an x-ray you could pick out a gate-array from custom silicon, but for really interesting new chips I can't believe this stuff is worth the effort.

I've always been skeptical of the notion that a fab could steal design secrets for logic designs. Maybe for memory.

Fabs normally get GDS-II files. You can get much more from a GDS-II file than a mask. correct?

 

[blueone]

Fabs normally get GDS-II files. You can get much more from a GDS-II file than a mask. correct?

This sounds like a question for @cliff.

 

[Tanj]

Fabs normally get GDS-II files. You can get much more from a GDS-II file than a mask. correct?

Focused Ion Beam (FIB) for the process analysis these days, not X-ray.

Most random logic likely is just that - random logic - after EDA placement, substitution of equivalent logic, added buffers and more than a dozen wiring layers so good luck with figuring that out backwards. Maybe someone has written tools for it.

 

[Tanj]

Individual IP like IO drivers or perhaps inventions in clocking, or particular cell methodologies like whatever domino has become, or the best way to make a CAM SRAM cell, may be concerns that could be figured out from the GDS-II but probably faster to just decap a sample chip and start stripping it apart with FIB to figure out relatively small scale puzzles like that.

 

[mozartct]

Lots of good comments and insights. At the end of the day, DoD got what they wanted (the 10-7 rules). I do not think that they cared a whole lot about the new fabs (about any new fab in fact). There were big concerns about Chinese AI capabilities (and surveillance, quantum etc.) and the best way to slow them down was to put hard boundaries around IC technology. TSMC and intel were gravy and the long term profitability of these operations an afterthought (for DoD).

Now a few years later, the market is oversupplied and that's without the new fabs (many in Taiwan, USA, Japan...). Moreover, China has reacted (why did we think they would not?) by buying lots of low-tech equipment (see OEMs annual reports). If and when that hardware is actually online, expect price to go through floor. I am concerned about long term viability of older fabs in Europe, USA, even Taiwan. Call it unintended consequences but it's real nonetheless.

Expect further delays in AZ, OH, Germany... And do not get me started on the concept of being a foundry and IDM at the same time! That is the fundamental problem with intel, unlikely to be resolved here.

 

[TBiggs]

High level: Asian fab are not that much cheaper unless you get incentives. Japan, Taiwan, Singapore can be more expensive. Intel like to have its fab in the US since there are already sites and partnerships with equipment vendors.

Incentives are the number one factor in all fab decision. IF the US gives incentives, then fabs will be built here. If not, they will be built elsewhere.

Incentives can cover / subsidized / offset partially the cost of labor, materials, and infrastructure. A larger long term challenge is setting up a capable, stable, workforce that can work within the local culture.

No question that between labor, culture and infrastructure certain countries and regions hold huge advantages that subsidies will be hard to overcome. If Asian didn’t have an overwhelming advantage wonder why they all went there, LOl

 

[TBiggs]

That is hardly true in this example. TSMC's schedule in Arizona was horribly informed from day one, i.e., the expectation that utility power would be ready in 1 year. They operated with their home-field mindset and failed to investigate the realities of constructing a new high-power delivery substation by the utility. Water will be the next problem as the high-capacity connections are being completed (clean and waste). The public statements made regarding the causes of the delay in Arizona contain nearly no truth. Especially the parts about skilled labor... yes, we have a trade labor shortage, across the entire country, but the local workforce had just completed tool install in Fab42 a couple of years prior, and the bulk of that experience had migrated up to TSMC. The real problem here is deeper than that, and when I personally shared it with the factory director, he was already aware of and acknowledged both the problem and the challenge of the required changes.

Good you and the director can see that the same kettle calling the pot black, LOL.